PIC12CE519-04I/SM Microchip Technology, PIC12CE519-04I/SM Datasheet - Page 306
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PIC12CE519-04I/SM
Manufacturer Part Number
PIC12CE519-04I/SM
Description
IC MCU OTP 1KX12 W/EE 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519-04I/SM
Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
41Byte
Cpu Speed
4MHz
No. Of Timers
1
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE519-04I/SM
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC12CE519-04I/SM
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 306 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
17.4.7.1
DS31017A-page 17-30
I
2
C Master Mode Operation
The master device generates all of the serial clock pulses and the START and STOP conditions.
A transfer is ended with a STOP condition or with a repeated START condition. Since the
repeated START condition is also the beginning of the next serial transfer, the I
released.
In Master transmitter mode serial data is output through SDA, while SCL outputs the serial clock.
The first byte transmitted contains the slave address of the receiving device, (7 bits) and the
Read/Write (R/W) bit. In this case the R/W bit will be logic '0'. Serial data is transmitted 8 bits at
a time. After each byte is transmitted, an acknowledge bit is received. START and STOP condi-
tions are output to indicate the beginning and the end of a serial transfer.
In Master receive mode the first byte transmitted contains the slave address of the transmitting
device (7 bits) and the R/W bit. In this case the R/W bit will be logic ‘1‘. Thus the first byte trans-
mitted is a 7-bit slave address followed by a '1' to indicate receive bit. Serial data is received via
SDA while SCL outputs the serial clock. Serial data is received 8 bits at a time. After each byte
is received, an acknowledge bit is transmitted. START and STOP conditions indicate the begin-
ning and end of transmission.
The baud rate generator used for SPI mode operation is used to set the SCL clock frequency for
either 100 kHz, 400 kHz, or 1 MHz I
tained in the lower 7 bits of the SSPADD register. The baud rate generator will automatically
begin counting on a write to the SSPBUF. Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK) the internal clock will automatically stop counting and
the SCL pin will remain in its last state.
A typical transmit sequence would go as follows:
a)
b)
c)
d)
e)
f)
g)
h)
i)
j)
k)
l)
The user generates a Start Condition by setting the START enable bit, SEN
(SSPCON2<0>).
SSPIF is set. The SSP module will wait the required start time before any other operation
takes place.
The user loads the SSPBUF with the address to transmit.
Address is shifted out the SDA pin until all 8 bits are transmitted.
The SSP Module shifts in the ACK bit from the slave device, and writes its value into the
SSPCON2 register (SSPCON2<6>).
The SSP module generates an interrupt at the end of the ninth clock cycle by setting the
SSPIF bit.
The user loads the SSPBUF with eight bits of data.
DATA is shifted out the SDA pin until all 8 bits are transmitted.
The SSP Module shifts in the ACK bit from the slave device, and writes its value into the
SSPCON2 register (SSPCON2<6>).
The SSP module generates an interrupt at the end of the ninth clock cycle by setting the
SSPIF bit.
The user generates a STOP condition by setting the STOP enable bit, PEN
(SSPCON2<2>).
Interrupt is generated once the stop condition is complete.
Preliminary
2
C operation. The baud rate generator reload value is con-
1997 Microchip Technology Inc.
2
C bus will not be
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