PIC18F24J10-I/SO Microchip Technology, PIC18F24J10-I/SO Datasheet - Page 89

• Manufacturer Part Number: PIC18F24J10-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1024 B
• Interface Type: SPI, I2C, MSSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 8-8:
REGISTER 8-9:
© 2007 Microchip Technology Inc.
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
bit 7
bit 6
bit 5-0
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
SSP2IE: Master Synchronous Serial Port 2 Interrupt Enable bit
1 = Enabled
0 = Disabled
BCL2IE: Bus Collision Interrupt Enable bit (MSSP2 module)
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
bit 7
bit 7
OSCFIE: Oscillator Fail Interrupt Enable bit
1 = Enabled
0 = Disabled
CMIE: Comparator Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
BCL1IE: Bus Collision Interrupt Enable bit (MSSP1 module)
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
CCP2IE: CCP2 Interrupt Enable bit
1 = Enabled
0 = Disabled
Legend:
R = Readable bit
-n = Value at POR
Legend:
R = Readable bit
-n = Value at POR
OSCFIE
SSP2IE
R/W-0
R/W-0
BCL2IE
R/W-0
R/W-0
CMIE
U-0
U-0
Preliminary
W = Writable bit
‘1’ = Bit is set
—
—
W = Writable bit
‘1’ = Bit is set
PIC18F45J10 FAMILY
U-0
U-0
—
—
BCL1IE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
U-0
U-0
—
—
DS39682C-page 87
CCP2IE
R/W-0
U-0
—
bit 0
bit 0