PIC16F690-I/SS Microchip Technology, PIC16F690-I/SS Datasheet - Page 205

• Manufacturer Part Number: PIC16F690-I/SS
• Description: IC PIC MCU FLASH 4KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F690-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/SSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-1, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPPIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSRAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.2.5
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired, then
OST is activated after the PWRT time-out has expired.
The total time-out will vary based on oscillator
configuration and PWRTE bit status. For example, in
EC mode with PWRTE bit erased (PWRT disabled),
there will be no time-out at all. Figures 14-4, 14-5
and 14-6 depict time-out sequences. The device can
execute code from the INTOSC while OST is active by
enabling Two-Speed Start-up or Fail-Safe Monitor (see
Section 3.7.2 “Two-speed Start-up Sequence” and
Section 3.8 “Fail-Safe Clock Monitor”).
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then,
bringing MCLR high will begin execution immediately
(see Figure 14-5). This is useful for testing purposes or
to synchronize more than one PIC16F631/677/685/
687/689/690 device operating in parallel.
Table 14-5 shows the Reset conditions for some
special registers, while Table 14-4 shows the Reset
conditions for all the registers.
TABLE 14-1:
TABLE 14-2:
TABLE 14-3:
© 2008 Microchip Technology Inc.
XT, HS, LP
LP, T1OSCIN = 1
RC, EC, INTOSC
PCON
STATUS
Legend:
Note
Legend: u = unchanged, x = unknown
Oscillator Configuration
POR
Name
0
u
u
u
u
u
1:
u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are not used by BOR.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
TIME-OUT SEQUENCE
BOR
Bit 7
x
0
u
u
u
u
IRP
—
TIME-OUT IN VARIOUS SITUATIONS
STATUS/PCON BITS AND THEIR SIGNIFICANCE
SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Bit 6
RP1
TO
—
1
1
0
0
u
1
PWRTE = 0
1024 • T
ULPWUE
T
T
T
PWRT
Bit 5
RPO
PWRT
PWRT
PIC16F631/677/685/687/689/690
PD
1
1
u
0
u
0
OSC
+
Power-up
SBOREN
Bit 4
Power-on Reset
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep
TO
PWRTE = 1
1024 • T
Bit 3
—
—
PD
—
OSC
14.2.6
The Power Control register PCON (address 8Eh) has
two Status bits to indicate what type of Reset that last
occurred.
Bit 0 is BOR (Brown-out Reset). BOR is unknown on
Power-on Reset. It must then be set by the user and
checked on subsequent Resets to see if BOR = 0,
indicating that a Brown-out has occurred. The BOR
Status bit is a “don’t care” and is not necessarily
predictable if the brown-out circuit is disabled
(BOREN<1:0>
register).
Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., V
gone too low).
For more information, see Section 4.2.4 “Ultra Low-
Power Wake-up” and Section 14.2.4 “Brown-out
Reset (BOR)”.
Bit 2
—
Z
PWRTE = 0
1024 • T
T
T
T
PWRT
PWRT
PWRT
Brown-out Reset
Bit 1
POR
DC
POWER CONTROL (PCON)
REGISTER
Condition
OSC
+
= 00 in the Configuration Word
Bit 0
BOR
C
1024 • T
PWRTE = 1
—
—
--01 --qq
0001 1xxx
POR, BOR
OSC
Value on
DS41262E-page 203
Wake-up from
1024 • T
DD
Sleep
--0u --uu
000q quuu
may have
Value on
—
—
all other
Resets
OSC