PIC16C621A-04I/P Microchip Technology, PIC16C621A-04I/P Datasheet - Page 26

IC MCU OTP 1KX14 COMP 18DIP

PIC16C621A-04I/P

Manufacturer Part Number
PIC16C621A-04I/P
Description
IC MCU OTP 1KX14 COMP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C621A-04I/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
96 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
96Byte
Cpu Speed
20MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C621A-04I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16C62X
4.4
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF
register. Any instruction using the INDF register
actually accesses data pointed to by the File Select
Register (FSR). Reading INDF itself indirectly will
produce 00h. Writing to the INDF register indirectly
results in a no-operation (although STATUS bits may
be affected). An effective 9-bit address is obtained by
concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-9. However, IRP
is not used in the PIC16C62X.
A simple program to clear RAM location 20h-7Fh using
indirect addressing is shown in Example 4-1.
FIGURE 4-9:
DS30235J-page 24
RP1
bank select
RP0
Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear.
For memory map detail see (Figure 4-4, Figure 4-5, Figure 4-6 and Figure 4-7).
Indirect Addressing, INDF and
FSR Registers
(1)
location select
6
Direct Addressing
Data
Memory
DIRECT/INDIRECT ADDRESSING PIC16C62X
from opcode
7Fh
00h
Bank 0
00
0
Bank 1
01
Bank 2
10
not used
EXAMPLE 4-1:
NEXT clrf
CONTINUE:
Bank 3
11
movlw
movwf
incf
btfss
goto
IRP
bank select
180h
1FFh
(1)
0x20
FSR
INDF
FSR
FSR,7
NEXT
7
Indirect Addressing
INDIRECT ADDRESSING
 2003 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR register
location select
0

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