PIC18F13K50-I/SS Microchip Technology, PIC18F13K50-I/SS Datasheet - Page 167
![IC PIC MCU FLASH 8KB 20-SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC18F13K50-I/SS
Manufacturer Part Number
PIC18F13K50-I/SS
Description
IC PIC MCU FLASH 8KB 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F14K50-IP.pdf
(422 pages)
Specifications of PIC18F13K50-I/SS
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F13K50-I/SS
Manufacturer:
MICROCHIP
Quantity:
5
Part Number:
PIC18F13K50-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F14K50-IP PDF datasheet #5
- Current page: 167 of 422
- Download datasheet (5Mb)
15.3.7
In I
reload value is placed in the SSPADD register
(Figure 15-17). When a write occurs to SSPBUF, the
Baud Rate Generator will automatically begin counting.
Once
transmission of the last data bit is followed by ACK), the
internal clock will automatically stop counting and the
SCL pin will remain in its last state.
FIGURE 15-17:
TABLE 15-3:
2010 Microchip Technology Inc.
Note 1:
2
C Master mode, the Baud Rate Generator (BRG)
the
48 MHz
48 MHz
48 MHz
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
BAUD RATE
F
OSC
given
2
C interface does not conform to the 400 kHz I
I
2
C™ CLOCK RATE W/BRG
operation
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
SCL
is
complete
12 MHz
12 MHz
12 MHz
10 MHz
10 MHz
10 MHz
SSPM<3:0>
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
F
CY
Reload
Control
(i.e.,
CLKOUT
Preliminary
Reload
Table 15-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
EQUATION 15-1:
2
BRG Down Counter
C specification (which applies to rates greater than
SSPADD<7:0>
BRG Value
0Ch
0Bh
1Fh
1Dh
18h
63h
09h
27h
02h
09h
00h
77h
PIC18F/LF1XK50
F
SCL
=
----------------------------------------------
SSPADD
F
OSC
(2 Rollovers of BRG)
/2
F
OSC
+
400 kHz
400 kHz
333 kHz
312.5 kHz
DS41350D-page 167
1 MHz
1 MHz
400 kHz
100 kHz
100 kHz
308 kHz
100 kHz
100 kHz
1
F
4
SCL
(1)
(1)
(1)
(1)
(1)
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