ATTINY24V-10MU Atmel, ATTINY24V-10MU Datasheet - Page 159
![IC MCU AVR 2K FLASH 10MHZ 20-QFN](/photos/6/87/68751/313-20-qfn_sml.jpg)
ATTINY24V-10MU
Manufacturer Part Number
ATTINY24V-10MU
Description
IC MCU AVR 2K FLASH 10MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY24V-10MU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
10MHz
Interface Type
SPI/USI
Total Internal Ram Size
128Byte
# I/os (max)
12
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
MLF
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY24V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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19. Memory Programming
19.1
8006K–AVR–10/10
Program And Data Memory Lock Bits
This section describes the different methods for programming ATtiny24/44/84 memories.
The ATtiny24/44/84 provides two lock bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional security listed in
erased to “1” with the Chip Erase command.
The device has no separate boot loader section. The SPM instruction is enabled for the whole
Flash, if the SELFPRGEN fuse is programmed (“0”), otherwise it is disabled.
Program memory can be read out via the debugWIRE interface when the DWEN fuse is pro-
grammed, even if lock bits are set. Thus, when lock bit security is required, debugWIRE should
always be disabled by clearing the DWEN fuse.
Table 19-1.
Note:
Table 19-2.
Notes:
Lock bits can also be read by device firmware. See section
Data from Software” on page
LB2
LB1
LB Mode
Memory Lock Bits
1
2
3
“1” means unprogrammed, “0” means programmed.
1. Program fuse bits before programming LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Lock Bit
Lock Bit Byte
Lock Bit Protection Modes.
LB2
1
1
0
(1) (2)
LB1
155.
1
0
0
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in
High-voltage and Serial Programming mode. The Fuse bits are
locked in both Serial and High-voltage Programming mode.
debugWire is disabled.
Further programming and verification of the Flash and EEPROM
is disabled in High-voltage and Serial Programming mode. The
Fuse bits are locked in both Serial and High-voltage
Programming mode.
Description
–
–
–
–
–
–
Lock bit
Lock bit
(1)
Table
debugWire is disabled.
“Reading Lock, Fuse and Signature
19-2. The lock bits can only be
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
ATtiny24/44/84
(1)
159
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