PIC18F24K20-E/SO Microchip Technology, PIC18F24K20-E/SO Datasheet - Page 25
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PIC18F24K20-E/SO
Manufacturer Part Number
PIC18F24K20-E/SO
Description
IC PIC MCU FLASH 8KX16 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
Specifications of PIC18F24K20-E/SO
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
64MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
4.2
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. Memory reads occur a single byte
at a time, so two bytes must be read to compare
against the word in the programmer’s buffer. Refer to
Section 4.1 “Read Code Memory, ID Locations and
Configuration Bits” for implementation details of
reading code memory.
FIGURE 4-2:
© 2009 Microchip Technology Inc.
Verify Code Memory and ID
Locations
No
with Post-increment
with Post-increment
Set TBLPTR = 0
Read High Byte
Read Low Byte
Word = Expect
code memory
verified?
data?
Does
VERIFY CODE MEMORY FLOW
Start
All
Yes
Yes
No
Failure,
Report
Error
Advance Information
Increment
Pointer
The Table Pointer must be manually set to 200000h
(base address of the ID locations) once the code
memory has been verified. The post-increment feature
of the table read 4-bit command can not be used to
increment the Table Pointer beyond the code memory
space. In a 64-Kbyte device, for example, a post-incre-
ment read of address FFFFh will wrap the Table Pointer
back to 000000h, rather than point to unimplemented
address 010000h.
PIC18F2XK20/4XK20
No
Set TBLPTR = 200000h
with Post-Increment
with Post-Increment
Read High byte
Read Low Byte
Word = Expect
ID locations
verified?
data?
Done
Does
All
Yes
Yes
No
DS41297F-page 25
Failure,
Report
Error