PIC18LF13K22-I/SO Microchip Technology, PIC18LF13K22-I/SO Datasheet - Page 326
![IC PIC MCU FLASH 256KX8 20-SOIC](/photos/6/64/66480/150-20-soic_sml.jpg)
PIC18LF13K22-I/SO
Manufacturer Part Number
PIC18LF13K22-I/SO
Description
IC PIC MCU FLASH 256KX8 20-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF13K22-ISS.pdf
(388 pages)
2.PIC18LF13K22-ISS.pdf
(12 pages)
3.PIC18LF13K22-ISS.pdf
(36 pages)
4.PIC18LF14K22-IP.pdf
(382 pages)
Specifications of PIC18LF13K22-I/SO
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, MSSP, SPI, USART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18LF13K22-ISS PDF datasheet
- PIC18LF13K22-ISS PDF datasheet #2
- PIC18LF13K22-ISS PDF datasheet #3
- PIC18LF14K22-IP PDF datasheet #4
- Current page: 326 of 388
- Download datasheet (4Mb)
PIC18F1XK22/LF1XK22
23.2.5
The latest versions of Microchip’s software tools have
been designed to fully support the extended instruction
set of the PIC18F1XK22/LF1XK22 family of devices.
This includes the MPLAB
assembly
Development Environment (IDE).
When
development, MPLAB IDE will automatically set default
Configuration bits for that device. The default setting for
the XINST Configuration bit is ‘0’, disabling the
extended instruction set and Indexed Literal Offset
Addressing mode. For proper execution of applications
developed to take advantage of the extended
instruction
programming.
To develop software for the extended instruction set,
the user must enable support for the instructions and
the Indexed Addressing mode in their language tool(s).
Depending on the environment being used, this may be
done in several ways:
• A menu option, or dialog box within the
• A command line option
• A directive in the source code
These options vary between different compilers,
assemblers and development environments. Users are
encouraged to review the documentation accompanying
their
information.
DS41365D-page 326
environment, that allows the user to configure the
language tool and its settings for the project
development
selecting
SPECIAL CONSIDERATIONS WITH
MICROCHIP MPLAB
language
set,
XINST
a
systems
target
and
®
C18 C compiler, MPASM
must
device
for
MPLAB
®
be
IDE TOOLS
the
for
set
appropriate
Integrated
software
during
Preliminary
2010 Microchip Technology Inc.
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