PIC16F628A-I/P Microchip Technology, PIC16F628A-I/P Datasheet - Page 50
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PIC16F628A-I/P
Manufacturer Part Number
PIC16F628A-I/P
Description
IC MCU FLASH 2KX14 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F627A-IP.pdf
(180 pages)
2.PIC16F627A-IP.pdf
(22 pages)
3.PIC16F627A-ISO.pdf
(168 pages)
4.PIC16F648A-ISS.pdf
(178 pages)
Specifications of PIC16F628A-I/P
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Package
18PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIPACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F628A-I/P
Manufacturer:
BT
Quantity:
562
Company:
Part Number:
PIC16F628A-I/P
Manufacturer:
MICROCHI
Quantity:
850
Part Number:
PIC16F628A-I/P
Manufacturer:
MICROCHIP
Quantity:
20 000
PIC16F627A/628A/648A
7.0
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L) which are
readable and writable. The TMR1 register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The Timer1 Interrupt, if
enabled, is generated on overflow of the TMR1 register
pair which latches the interrupt flag bit TMR1IF
(PIR1<0>). This interrupt can be enabled/disabled by
setting/clearing the Timer1 interrupt enable bit TMR1IE
(PIE1<0>).
Timer1 can operate in one of two modes:
• As a timer
• As a counter
The Operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
REGISTER 7-1:
DS40044G-page 50
TIMER1 MODULE
bit 7-6
bit 5-4
bit 3
bit 2
bit 1
bit 0
T1CON – TIMER1 CONTROL REGISTER (ADDRESS: 10h)
bit 7
Unimplemented: Read as ‘0’
T1CKPS<1:0>: Timer1 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T1OSCEN: Timer1 Oscillator Enable Control bit
1 = Oscillator is enabled
0 = Oscillator is shut off
T1SYNC: Timer1 External Clock Input Synchronization Control bit
TMR1CS = 1
1 = Do not synchronize external clock input
0 = Synchronize external clock input
TMR1CS = 0
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
TMR1CS: Timer1 Clock Source Select bit
1 = External clock from pin RB6/T1OSO/T1CKI/PGC (on the rising edge)
0 = Internal clock (F
TMR1ON: Timer1 On bit
1 = Enables Timer1
0 = Stops Timer1
Legend:
R = Readable bit
-n = Value at POR
Note 1: The oscillator inverter and feedback resistor are turned off to eliminate power drain.
U-0
—
U-0
—
OSC
T1CKPS1 T1CKPS0
(1)
/4)
R/W-0
W = Writable bit
‘1’ = Bit is set
R/W-0
In Timer mode, the TMR1 register pair value
increments every instruction cycle. In Counter mode, it
increments on every rising edge of the external clock
input.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Timer1 also has an internal “Reset input”. This Reset
can be generated by the CCP module (Section 9.0
“Capture/Compare/PWM
Register 7-1 shows the Timer1 control register.
For the PIC16F627A/628A/648A, when the Timer1
oscillator is enabled (T1OSCEN is set), the RB7/
T1OSI/PGD
become inputs. That is, the TRISB<7:6> value is
ignored.
T1OSCEN
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
and
RB6/T1OSO/T1CKI/PGC
T1SYNC TMR1CS TMR1ON
R/W-0
© 2009 Microchip Technology Inc.
(CCP)
x = Bit is unknown
R/W-0
Module”).
R/W-0
bit 0
pins