ATMEGA48V-10AU Atmel, ATMEGA48V-10AU Datasheet - Page 127

• Manufacturer Part Number: ATMEGA48V-10AU
• Description: IC AVR MCU 4K 10MHZ 1.8V 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48V-10AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire/SPI/USART/Serial
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 23
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 32-pin TQFP
• Programmable Memory: 4K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2545S–AVR–07/10
Figure 15-11. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
Figure 15-12
frequency correct PWM mode the OCR1x Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOV1 Flag at BOTTOM.
Figure 15-12. Timer/Counter Timing Diagram, no Prescaling
Figure 15-13
(PC and PFC PWM)
and ICFn
(CTC and FPWM)
TCNTn
OCRnx
OCFnx
(clk
TOVn
(Update at TOP)
clk
clk
I/O
TCNTn
TCNTn
OCRnx
as TOP)
(clk
I/O
Tn
clk
clk
/8)
I/O
shows the count sequence close to TOP in various modes. When using phase and
shows the same timing data, but with the prescaler enabled.
(FPWM)
I/O
Tn
/1)
(if used
OCRnx - 1
TOP - 1
TOP - 1
Old OCRnx Value
OCRnx
OCRnx Value
TOP
TOP
OCRnx + 1
ATmega48/88/168
BOTTOM
TOP - 1
New OCRnx Value
OCRnx + 2
BOTTOM + 1
TOP - 2
clk_I/O
/8)
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