PIC16LF628A-I/P Microchip Technology, PIC16LF628A-I/P Datasheet - Page 70
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PIC16LF628A-I/P
Manufacturer Part Number
PIC16LF628A-I/P
Description
IC MCU FLASH 2KX14 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F627A-IP.pdf
(180 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC16F627A-ISO.pdf
(168 pages)
Specifications of PIC16LF628A-I/P
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F627A/628A/648A
EXAMPLE 11-1:
11.2
The full range of V
the construction of the module. The transistors on the
top and bottom of the resistor ladder network
(Figure 11-1) keep V
The Voltage Reference is V
the V
tested absolute accuracy of the Voltage Reference can
be found in Table 17-3.
11.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time out, the contents of
the VRCON register are not affected. To minimize
current consumption in Sleep mode, the Voltage
Reference should be disabled.
FIGURE 11-2:
TABLE 11-1:
DS40044B-page 68
9Fh
1Fh
85h
Legend: — = Unimplemented, read as ‘0’.
MOVLW
MOVWF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
CALL
Address
Note 1: R is dependent upon the Voltage Reference Configuration VRCON<3:0> and VRCON<5>.
REF
Voltage Reference Accuracy/Error
Operation During Sleep
output changes with fluctuations in V
0x02
CMCON
STATUS,RP0 ;go to Bank 1
0x07
TRISA
0xA6
VRCON
STATUS,RP0 ;go to Bank 0
DELAY10
VRCON
CMCON C2OUT C1OUT
TRISA
Name
REGISTERS ASSOCIATED WITH VOLTAGE REFERENCE
SS
Module
V
REF
REF
TRISA7 TRISA6 TRISA5 TRISA4
to V
VREN
Bit 7
VOLTAGE REFERENCE
CONFIGURATION
VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
;4 Inputs Muxed
;to 2 comps.
;RA3-RA0 are
;outputs
;enable V
;low range set V
;10 s delay
from approaching V
DD
Voltage
Reference
Output
Impedance
DD
cannot be realized due to
VROE
Bit 6
derived and therefore,
R
REF
(1)
C2INV
Bit 5
VRR
RA2
R
<3:0>=6
SS
DD
or V
C1INV
Bit 4
. The
—
Preliminary
DD
.
TRISA3
Bit 3
VR3
CIS
11.4
A device Reset disables the Voltage Reference by
clearing bit V
disconnects the reference from the RA2 pin by clearing
bit V
range by clearing bit V
value select bits, VRCON<3:0>, are also cleared.
11.5
The
independently of the comparator module. The output of
the reference generator may be connected to the RA2
pin if the TRISA<2> bit is set and the V
VRCON<6>, is set. Enabling the Voltage Reference
output onto the RA2 pin with an input signal present will
increase current consumption. Connecting RA2 as a
digital output with V
current consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited drive
capability, a buffer must be used in conjunction with the
Voltage Reference output for external connections to
V
technique.
REF
TRISA2
Bit 2
CM2
VR2
ROE
. Figure 11-2 shows an example buffering
Opamp
+
Voltage
Effects of a Reset
Connection Considerations
(VRCON<6>) and selects the high voltage
TRISA1
Bit 1
CM1
VR1
REN
Reference
V
(VRCON<7>). This Reset also
TRISA0
REF
REF
Bit 0
CM0
VR0
2004 Microchip Technology Inc.
RR
Output
enabled will also increase
(VRCON<5>). The V
000- 0000
0000 0000
1111 1111
Value On
POR
Module
000- 0000
0000 0000
1111 1111
Value On
All Other
Resets
operates
ROE
REF
bit,