ATTINY461A-MU Atmel, ATTINY461A-MU Datasheet - Page 20
ATTINY461A-MU
Manufacturer Part Number
ATTINY461A-MU
Description
IC MCU AVR 4K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY461A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY461A-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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5.4
5.4.1
5.5
5.5.1
20
I/O Memory
Register Description
ATtiny261A/461A/861A
General Purpose I/O Registers
EEARH – EEPROM Address Register
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
The I/O space definition of the ATtiny261A/461A/861A is shown in
273.
All I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed using the
LD/LDS/LDD and ST/STS/STD instructions, enabling data transfer between the 32 general pur-
pose working registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F
are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of sin-
gle bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set
section for more details. When using the I/O specific commands IN and OUT, the I/O addresses
0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST
instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, the CBI and
SBI instructions will only operate on the specified bit, and can therefore be used on registers
containing such Status Flags. The CBI and SBI instructions work on registers in the address
range 0x00 to 0x1F, only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny261A/461A/861A contains three General Purpose I/O Registers. These registers can
be used for storing any information, and they are particularly useful for storing global variables
and Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 7:1 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bit 0 – EEAR8: EEPROM Address
This is the most significant EEPROM address bit of ATtiny861A. In devices with less EEPROM,
i.e. ATtiny261A/ATtiny461A, this bit is reserved and will always read zero. The initial value of the
EEPROM Address Register (EEAR) is undefined and a proper value must therefore be written
before the EEPROM is accessed.
Bit
0x1F (0x3F)
Read/Write
Initial Value
R
7
–
0
R
6
–
0
5
–
R
0
R
4
–
0
R
3
–
0
R
2
–
0
“Register Summary” on page
R
1
–
0
EEAR8
R/W
X/0
0
8197B–AVR–01/10
EEARH
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