PIC18F26K20-E/SS Microchip Technology, PIC18F26K20-E/SS Datasheet - Page 310
![IC PIC MCU FLASH 32KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18F26K20-E/SS
Manufacturer Part Number
PIC18F26K20-E/SS
Description
IC PIC MCU FLASH 32KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F26K20-ISS.pdf
(6 pages)
4.PIC18F26K20-ISS.pdf
(10 pages)
5.PIC18F26K20-EML.pdf
(430 pages)
Specifications of PIC18F26K20-E/SS
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.84375KB
Cpu Speed
64MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K20-E/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F26K20-ISS PDF datasheet #3
- PIC18F26K20-ISS PDF datasheet #4
- PIC18F26K20-EML PDF datasheet #5
- Current page: 310 of 456
- Download datasheet (4Mb)
PIC18F2XK20/4XK20
23.3
The overall structure of the code protection on the
PIC18 Flash devices differs significantly from other
PIC
The user program memory is divided into three or five
blocks, depending on the device. One of these is a
Boot Block of 0.5K or 2K bytes, depending on the
device. The remainder of the memory is divided into
individual blocks on binary boundaries.
FIGURE 23-2:
TABLE 23-3:
DS41303G-page 310
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
Legend: Shaded cells are unimplemented.
Note 1:
®
microcontroller devices.
File Name
(2000h-1FFFFFh)
Program Verification and
Code Protection
(PIC18FX3K20)
Unimplemented
(1000h-1FFFh)
(000h-1FFh)
(200h-FFFh)
Implemented, but not used in PIC18FX3K20 and PIC18FX4K20 devices.
Boot Block
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
Read ‘0’s
8 Kbytes
Block 0
Block 1
SUMMARY OF CODE PROTECTION REGISTERS
CODE-PROTECTED PROGRAM MEMORY FOR PIC18F2XK20/4XK20
WRTD
Bit 7
CPD
—
—
—
—
(4000h-1FFFFFh)
(PIC18FX4K20)
Unimplemented
(2000h-3FFFh)
(800h-1FFFh)
(000h-7FFh)
16 Kbytes
Boot Block
Read ‘0’s
Block 0
Block 1
MEMORY SIZE/DEVICE
EBTRB
WRTB
Bit 6
CPB
—
—
—
WRTC
Bit 5
(8000h-1FFFFFh)
(PIC18FX5K20)
—
—
—
—
—
Unimplemented
(2000h-3FFFh)
(4000h-5FFFh)
(6000h-7FFFh)
(800h-1FFFh)
(000h-7FFh)
Boot Block
32 Kbytes
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
Bit 4
—
—
—
—
—
—
Each of the blocks has three code protection bits asso-
ciated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn)
Figure 23-2 shows the program memory organization
for 8, 16 and 32-Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 23-3.
(10000h-1FFFFFh)
EBTR3
(PIC18FX6K20)
WRT3
(C000h-FFFFh)
Unimplemented
(8000h-BFFFh)
(4000h-7FFFh)
CP3
(800h-3FFFh)
(000h-7FFh)
Bit 3
Boot Block
64 Kbytes
—
—
—
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
(1)
(1)
(1)
EBTR2
WRT2
CP2
Bit 2
2010 Microchip Technology Inc.
—
—
—
(1)
(1)
(1)
Block Code Protection
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
(Unimplemented
Memory Space)
Controlled By:
EBTR1
WRT1
Bit 1
CP1
—
—
—
EBTR0
WRT0
Bit 0
CP0
—
—
—
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