PIC16C716-04/P Microchip Technology, PIC16C716-04/P Datasheet - Page 26
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PIC16C716-04/P
Manufacturer Part Number
PIC16C716-04/P
Description
IC MCU OTP 2KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C716-04/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 4x8b
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16C712/716
3.2
PORTB is an 8-bit wide bidirectional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (= 1) will make the corresponding PORTB
pin an input, (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISB bit (= 0)
will make the corresponding PORTB pin an output,
(i.e., put the contents of the output latch on the selected
pin).
EXAMPLE 3-2:
FIGURE 3-3:
DS41106B-page 24
BCF
CLRF
BSF
MOVLW
MOVWF
PORTB and the TRISB Register
Note 1:
STATUS, RP0
PORTB
STATUS, RP0
0xCF
TRISB
To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).
DATA BUS
WR TRIS
INITIALIZING PORTB
BLOCK DIAGRAM OF RB0 PIN
WR PORT
RBPU
RB0/INT
;
; Initialize PORTB by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
(1)
RD TRIS
RD PORT
TRIS Latch
Data Latch
D
D
CK
CK
Schmitt Trigger
Buffer
Q
Q
Q
EN
TTL
Input
Buffer
D
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION_REG<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on a Power-on Reset.
V
P
RD PORT
DD
weak
pull-up
V
SS
V
DD
I/O
pin
© 2005 Microchip Technology Inc.