PIC16F819-I/SS Microchip Technology, PIC16F819-I/SS Datasheet - Page 657
PIC16F819-I/SS
Manufacturer Part Number
PIC16F819-I/SS
Description
IC MCU FLASH 2KX14 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F819-I/SS
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F819-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC16F818-ISO PDF datasheet #5
- PIC16F818-ISO PDF datasheet #6
- Current page: 657 of 688
- Download datasheet (3Mb)
A.3
1997 Microchip Technology Inc.
Transfer Acknowledge
SDA
SCL
Condition
Start
S
All data must be transmitted per byte, with no limit to the number of bytes transmitted per data
transfer. After each byte, the slave-receiver generates an acknowledge bit (ACK)
When a slave-receiver doesn’t acknowledge the slave address or received data, the master must
abort the transfer. The slave must leave SDA high so that the master can generate the STOP con-
dition
Figure A-4:
If the master is receiving the data (master-receiver), it generates an acknowledge signal for each
received byte of data, except for the last byte. To signal the end of data to the slave-transmitter,
the master does not generate an acknowledge (not acknowledge). The slave then releases the
SDA line so the master can generate the STOP condition. The master can also generate the
STOP condition during the acknowledge pulse for valid termination of data transfer.
If the slave needs to delay the transmission of the next byte, holding the SCL line low will force
the master into a wait state. Data transfer continues when the slave releases the SCL line. This
allows the slave to move the received data or fetch the data it needs to transfer before allowing
the clock to start. This wait state technique can also be implemented at the bit level,
Figure A-5:
MSB
1
(Figure
Address
2
A-1).
Slave-Receiver Acknowledge
Data Transfer Wait State
acknowledgment
signal from receiver
Transmitter
7
Output by
Output by
SCL from
Receiver
Master
Data
Data
R/W
8
Condition
Start
S
ACK
9
byte complete
interrupt with receiver
Wait
State
1
clock line held low while
interrupts are serviced
1
2
not acknowledge
acknowledge
Data
2
8
Acknowledgment
Clock Pulse for
3 8
acknowledgment
signal from receiver
Appendix A
9
ACK
9
DS31034A-page 34-5
Condition
Stop
P
(Figure
Figure
A-4).
A-5.
34
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