PIC16F916-I/SO Microchip Technology, PIC16F916-I/SO Datasheet - Page 119

IC PIC MCU FLASH 8KX14 28SOIC

PIC16F916-I/SO

Manufacturer Part Number
PIC16F916-I/SO
Description
IC PIC MCU FLASH 8KX14 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F916-I/SO

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
352 B
Interface Type
SSP/I2C/AUSART/SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F916-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
8.8
This feature can be used to time the duration or interval
of analog events. Clearing the T1GSS bit of the
CMCON1 register will enable Timer1 to increment
based on the output of Comparator C2. This requires
that Timer1 is on and gating is enabled. See
Section 6.0 “Timer1 Module with Gate Control” for
details.
It is recommended to synchronize Comparator C2 with
Timer1 by setting the C2SYNC bit when the comparator
is used as the Timer1 gate source. This ensures Timer1
does not miss an increment if the comparator changes
during an increment.
REGISTER 8-2:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1
bit 0
Note 1:
U-0
2:
Comparator C2 Gating Timer1
Refer to Section 6.6 “Timer1 Gate”.
Refer to Figure 8-3.
Unimplemented: Read as ‘0’
T1GSS: Timer1 Gate Source Select bit
1 = Timer1 gate source is T1G pin (pin should be configured as digital input)
0 = Timer1 gate source is Comparator C2 output
C2SYNC: Comparator C2 Output Synchronization bit
1 = Output is synchronized with falling edge of Timer1 clock
0 = Output is asynchronous
U-0
CMCON1: COMPARATOR CONFIGURATION REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
PIC16F913/914/916/917/946
U-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
8.9
The output of Comparator C2 can be synchronized with
Timer1 by setting the C2SYNC bit of the CMCON1
register. When enabled, the comparator output is
latched on the falling edge of the Timer1 clock source.
If a prescaler is used with Timer1, the comparator
output is latched after the prescaling function. To
prevent a race condition, the comparator output is
latched on the falling edge of the Timer1 clock source
and Timer1 increments on the rising edge of its clock
source. Reference the comparator block diagrams
(Figure 8-2 and Figure 8-3) and the Timer1 Block
Diagram (Figure 6-1) for more information.
U-0
(2)
Synchronizing Comparator C2
Output to Timer1
U-0
x = Bit is unknown
T1GSS
R/W-1
DS41250F-page 117
C2SYNC
R/W-0
bit 0

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