PIC24FJ32GA002-I/SO Microchip Technology, PIC24FJ32GA002-I/SO Datasheet - Page 43

IC PIC MCU FLASH 11KX24 28SOIC

PIC24FJ32GA002-I/SO

Manufacturer Part Number
PIC24FJ32GA002-I/SO
Description
IC PIC MCU FLASH 11KX24 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ32GA002-I/SO

Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 5-5:
© 2008 Microchip Technology Inc.
Step 7: Repeat Steps 5 and 6 to erase the second page of executive memory. The W1 Pointer should be
Step 8: Initialize TBLPAG and NVMCON to write stored diagnostic and calibration as single words. Initialize W1
Step 9: Perform write of a single word of calibration data and initiate single-word write cycle.
Step 10: Repeat this step to poll the WR bit (bit 15 of NVMCON) until it is cleared by the hardware.
Step 11: Repeat steps 9-10 seven more times to program the remainder of the Diagnostic and Calibration Words
Step 12: Initialize the NVMCON to program 64 instruction words.
Step 13: Initialize TBLPAG and the Write Pointer (W7).
Step 14: Load W0:W5 with the next four words of packed programming executive code and initialize W6 for
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
incremented by 400h to point to the second page.
and W2 as Write and Read Pointers to rewrite stored Diagnostic and Calibration Words.
back into program memory.
programming. Programming starts from the base of executive memory (800000h) using W6 as a Read
Pointer and W7 as a Write Pointer.
2<LSW0>0
2<MSB1:MSB0>1
2<LSW1>2
2<LSW2>3
2<MSB3:MSB2>4
2<LSW3>5
PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED)
200800
880190
240031
883B01
207F00
2000C2
000000
BB18B2
000000
000000
A8E761
000000
000000
040200
000000
803B00
883C20
000000
<VISI>
000000
240010
883B00
200800
880190
EB0380
000000
(Hex)
Data
MOV
MOV
MOV
MOV
MOV
MOV
NOP
TBLWTL
NOP
NOP
BSET
NOP
NOP
GOTO
NOP
MOV
MOV
NOP
Clock out contents of VISI register.
NOP
MOV
MOV
MOV
MOV
CLR
NOP
MOV
MOV
MOV
MOV
MOV
MOV
#0x80, W0
W0, TBLPAG
#0x4003, W1
W1, NVMCON
#0x07F0, W1
#0xC, W2
[W2++], [W1++]
NVMCON, #15
0x200
NVMCON, W0
W0, VISI
#0x4001, W0
W0, NVMCON
#0x80, W0
W0, TBLPAG
W7
#<LSW0>, W0
#<MSB1:MSB0>, W1
#<LSW1>, W2
#<LSW2>, W3
#<MSB3:MSB2>, W4
#<LSW3>, W5
PIC24FJXXXGA0XX
Description
DS39768D-page 43

Related parts for PIC24FJ32GA002-I/SO