PIC16F628-20I/P Microchip Technology, PIC16F628-20I/P Datasheet - Page 90

• Manufacturer Part Number: PIC16F628-20I/P
• Description: IC MCU FLASH 2KX14 COMP 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628-20I/P

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA16XP183 - ADAPTER ICE 18DIP/SOIC/SSOPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F62X
REGISTER 13-2:
DS40300C-page 88
bit 7-4
bit 3
bit 2
bit 1
bit 0
EECON1 REGISTER (ADDRESS: 9Ch)
Unimplemented: Read as '0'
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated (any MCLR Reset, any WDT Reset during
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
1 = Initiates a write cycle. (The bit is cleared by hardware once write is complete. The WR bit
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read (read takes one cycle. RD is cleared in hardware. The RD bit
0 = Does not initiate an EEPROM read
bit 7
Legend:
R = Readable bit
-n = Value at POR
U-0
—
normal operation or BOD Reset)
can only be set (not cleared) in software.
can only be set (not cleared) in software).
U-0
—
U-0
Preliminary
—
W = Writable bit
’1’ = Bit is set
U-0
—
WRERR
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-x
WREN
R/W-0
 2003 Microchip Technology Inc.
x = Bit is unknown
R/S-0
WR
R/S-x
RD
bit 0