PIC16F628-20I/SO Microchip Technology, PIC16F628-20I/SO Datasheet - Page 80
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PIC16F628-20I/SO
Manufacturer Part Number
PIC16F628-20I/SO
Description
IC MCU FLASH 2KX14 COMP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16F628-20I/SO
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Data Rom Size
128 B
Height
2.31 mm
Length
11.53 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F628-20I/SO
Manufacturer:
MIC
Quantity:
20 000
PIC16F62X
FIGURE 12-9:
FIGURE 12-10:
FIGURE 12-11:
DS40300C-page 78
Note 1: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG
Note 1: This timing diagram shows an address byte followed by an data byte. The data byte is not read into the RCREG
RB1/RX/DT (PIN)
RB1/RX/DT (PIN)
RB1/RX/DT (PIN)
Note 1: This timing diagram shows an address byte followed by an data byte. The data byte is read into the RCREG
RCV SHIFT REG
RCV BUFFER REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
ADEN = 1
(ADDRESS MATCH
RCV SHIFT
REG
RCV BUFFER REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
ADEN = 1
(ADDRESS MATCH
RCV SHIFT
REG
RCV BUFFER REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
ADEN
(ADDRESS MATCH
ENABLE)
ENABLE)
ENABLE)
(Receive Buffer) because ADEN = 1 and Bit 8 = 0.
(receive buffer) because ADEN was not updated (still = 1) and Bit 8 = 0.
(Receive Buffer) because ADEN was updated after an address match, and was cleared to a ‘0’, so the contents of
the Receive Shift Register (RSR) are read into the Receive Buffer regardless of the value of Bit 8.
'1'
'1'
START
START
START
BIT
BIT
BIT
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST FOLLOWED BY
VALID DATA BYTE
BIT0
BIT0
BIT0
BIT8 = 1, ADDRESS BYTE
BIT8 = 1, ADDRESS BYTE
BIT8 = 0, DATA BYTE
BIT1
BIT1
BIT1
BIT8
BIT8
BIT8
STOP
STOP
STOP
Preliminary
BIT
BIT
BIT
WORD 1
RCREG
WORD 1
RCREG
START
START
START
BIT
BIT
BIT
BIT8 = 1, ADDRESS BYTE
BIT0
BIT0
BIT0
BIT8 = 0, DATA BYTE
BIT8 = 0, DATA BYTE
BIT8
BIT8
BIT8
STOP
STOP
STOP
BIT
BIT
BIT
WORD 2
RCREG
WORD 1
RCREG
2003 Microchip Technology Inc.
'1'
'1'