PIC24HJ12GP202-I/SO Microchip Technology, PIC24HJ12GP202-I/SO Datasheet - Page 23

• Manufacturer Part Number: PIC24HJ12GP202-I/SO
• Description: IC PIC MCU FLASH 4KX24 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ12GP202-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
The
separate program and data memory spaces and
buses. This architecture also allows the direct access
of program memory from the data space during code
execution.
FIGURE 4-1:
© 2009 Microchip Technology Inc.
Note:
PIC24HJ12GP201/202
MEMORY ORGANIZATION
This data sheet summarizes the features
of the PIC24HJ12GP201/202 family of
devices. However, it is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to the “PIC24H Family
Reference Manual”, Section 3. “Data
Memory” (DS70237), which is available
from
(www.microchip.com).
the
PROGRAM MEMORY FOR PIC24HJ12GP201/202 DEVICES
Microchip
architecture
web
features
PIC24HJ12GP201/202
Interrupt Vector Table
Alternate Vector Table
Device Configuration
site
GOTO Instruction
(4K instructions)
Preliminary
Unimplemented
Reset Address
User Program
Flash Memory
(Read ‘0’s)
Reserved
Registers
DEVID (2)
Reserved
Reserved
PIC24HJ12GP201/202
4.1
The
PIC24HJ12GP201/202 devices is 4M instructions. The
space is addressable by a 24-bit value derived either
from the 23-bit Program Counter (PC) during program
execution, or from table operation or data space
remapping as described in Section 4.4 “Interfacing
Program and Data Memory Spaces”.
User application access to the program memory space is
restricted to the lower half of the address range (0x000000
to 0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to the
Configuration bits and Device ID sections of the
configuration memory space.
The memory map for the PIC24HJ12GP201/202 family of
devices is shown in Figure 4-1.
program
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x001FFE
0x002000
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
0xF80000
Program Address Space
address
memory
DS70282D-page 21
space
of
the