PIC18F26J50-I/SS Microchip Technology, PIC18F26J50-I/SS Datasheet - Page 470

• Manufacturer Part Number: PIC18F26J50-I/SS
• Description: IC PIC MCU FLASH 64K 2V 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26J50-I/SS

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Interface: EUSART, I2C, SPI, USB
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F46J50 FAMILY
TBLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
DS39931C-page 470
Table Write
TBLWT ( *; *+; *-; +*)
None
if TBLWT*,
(TABLAT) → Holding Register,
TBLPTR – No Change;
if TBLWT*+,
(TABLAT) → Holding Register,
(TBLPTR) + 1 → TBLPTR;
if TBLWT*-,
(TABLAT) → Holding Register,
(TBLPTR) – 1 → TBLPTR;
if TBLWT+*,
(TBLPTR) + 1 → TBLPTR,
(TABLAT) → Holding Register
None
This instruction uses the 3 LSBs of
TBLPTR to determine which of the
8 holding registers the TABLAT is written
to. The holding registers are used to
program the contents of Program Memory
(P.M.). (Refer to Section 5.0 “Memory
Organization” for additional details on
programming Flash memory.)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory.
TBLPTR has a 2-Mbyte address range.
The LSb of the TBLPTR selects which
byte of the program memory location to
access.
TBLPTR<0> = 0: Least Significant Byte
TBLPTR<0> = 1: Most Significant Byte of
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
1
2
operation
Decode
0000
Q1
No
operation
operation
TABLAT)
(Read
0000
Q2
No
No
of Program Memory
Word
Program Memory Word
operation
operation
0000
Q3
No
No
nn=0 *
operation
operation
Register)
(Write to
Holding
=1 *+
=2 *-
=3 +*
11nn
Q4
No
No
TBLWT
Example 1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
TABLAT
TBLPTR
HOLDING REGISTER
(00A356h)
TABLAT
TBLPTR
HOLDING REGISTER
(00A356h)
TABLAT
TBLPTR
HOLDING REGISTER
(01389Ah)
HOLDING REGISTER
(01389Bh)
TABLAT
TBLPTR
HOLDING REGISTER
(01389Ah)
HOLDING REGISTER
(01389Bh)
Table Write (Continued)
TBLWT *+;
TBLWT +*;
© 2009 Microchip Technology Inc.
=
=
=
=
=
=
=
=
=
=
=
=
=
=
55h
00A356h
FFh
55h
00A357h
55h
34h
01389Ah
FFh
FFh
34h
01389Bh
FFh
34h