PIC16F872-I/SP Microchip Technology, PIC16F872-I/SP Datasheet - Page 99
![IC MCU FLASH 2KX14 EE 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16F872-I/SP
Manufacturer Part Number
PIC16F872-I/SP
Description
IC MCU FLASH 2KX14 EE 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F872-ISO.pdf
(168 pages)
5.PIC16F872-ISO.pdf
(5 pages)
6.PIC16F872-ISO.pdf
(6 pages)
7.PIC16F872-ISO.pdf
(168 pages)
Specifications of PIC16F872-I/SP
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/SPI/SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F872-I/SP
Manufacturer:
PIC
Quantity:
270
Company:
Part Number:
PIC16F872-I/SP
Manufacturer:
PIC
Quantity:
270
Company:
Part Number:
PIC16F872-I/SP
Manufacturer:
SILICON
Quantity:
1 000
Part Number:
PIC16F872-I/SP
Manufacturer:
MIC
Quantity:
20 000
11.10 Interrupts
The PIC16F872 has 10 sources of interrupt. The inter-
rupt control register (INTCON) records individual inter-
rupt requests in flag bits. It also has individual and
global interrupt enable bits.
A global interrupt enable bit, GIE (INTCON<7>),
enables (if set) all unmasked interrupts or disables (if
cleared) all interrupts. When bit GIE is enabled, and an
interrupt’s flag bit and mask bit are set, the interrupt will
vector immediately. Individual interrupts can be dis-
abled through their corresponding enable bits in vari-
ous registers. Individual interrupt bits are set,
regardless of the status of the GIE bit. The GIE bit is
cleared on RESET.
The “return from interrupt” instruction, RETFIE, exits
the interrupt routine, as well as sets the GIE bit, which
re-enables interrupts.
FIGURE 11-9:
Note:
2002 Microchip Technology Inc.
EEIF
EEIE
BCLIF
BCLIE
Individual interrupt flag bits are set, regard-
less of the status of their corresponding
mask bit or the GIE bit.
ADIF
ADIE
TMR1IF
TMR1IE
INTERRUPT LOGIC
SSPIF
SSPIE
CCP1IF
CCP1IE
TMR2IF
TMR2IE
TMR0IF
TMR0IE
INTF
INTE
RBIF
RBIE
PEIE
GIE
The RB0/INT pin interrupt, the RB port change interrupt
and the TMR0 overflow interrupt flags are contained in
the INTCON register.
The peripheral interrupt flags are contained in the spe-
cial function registers, PIR1 and PIR2. The correspond-
ing interrupt enable bits are contained in special
function registers, PIE1 and PIE2, and the peripheral
interrupt enable bit is contained in special function
register, INTCON.
When an interrupt is responded to, the GIE bit is
cleared to disable any further interrupt, the return
address is pushed onto the stack and the PC is loaded
with 0004h. Once in the Interrupt Service Routine, the
source(s) of the interrupt can be determined by polling
the interrupt flag bits. The interrupt flag bit(s) must be
cleared in software before re-enabling interrupts to
avoid recursive interrupts.
For external interrupt events, such as the INT pin or
PORTB change interrupt, the interrupt latency will be
three or four instruction cycles. The exact latency
depends when the interrupt event occurs. The latency
is the same for one or two-cycle instructions. Individual
interrupt flag bits are set, regardless of the status of
their corresponding mask bit, PEIE bit, or GIE bit
PIC16F872
Wake-up (If in SLEEP mode)
Interrupt to CPU
DS30221B-page 97