PIC24HJ32GP202-I/SO Microchip Technology, PIC24HJ32GP202-I/SO Datasheet - Page 60
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PIC24HJ32GP202-I/SO
Manufacturer Part Number
PIC24HJ32GP202-I/SO
Description
IC PIC MCU FLASH 32K 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
5.PIC24HJ32GP204-IML.pdf
(244 pages)
Specifications of PIC24HJ32GP202-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOIC
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 8-1:
DS70152H-page 60
Standard Operating Conditions
Operating Temperature: –40ºC-85ºC. Programming at 25ºC is recommended.
Param
P9b
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
No.
Note 1: V
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
2: Time depends on the FRC accuracy and the value of the FRC Oscillator tuning register. Refer to
DLY
DLY
DLY
DLY
DLY
R
VALID
DLY
HLD
KEY
KEY
DLY
MCLRH
±0.3V of V
“Electrical Characteristics” section in the specific device data sheet.
5
6
7
8
9
10 Delay between Last PGCx ↓ and MCLR ↓
3
1
2
11 Maximum Wait Time for Configuration
DD
must also be supplied to the AV
Delay between PGDx ↓ by Programming
Executive to PGDx Released by
Programming Executive
PGCx Low Time After Programming
Bulk Erase Time
Page Erase Time
Row Programming Time
MCLR Rise Time to Enter ICSP mode
Data Out Valid from PGCx ↑
MCLR ↓ to V
Delay from First MCLR ↓ to First PGCx ↑
for Key Sequence on PGDx
Delay from Last PGCx ↓ for Key Sequence
on PGDx to Second MCLR ↑
Register Programming
MCLR High Time
AC/DC CHARACTERISTICS AND TIMING REQUIREMENTS (CONTINUED)
DD
and V
DD
Characteristic
SS
↓
, respectively.
DD
pins during programming. AV
19.5
1.28
Min
400
330
15
10
25
—
—
—
—
0
1
Max
100
500
1.0
23
25
—
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—
—
—
—
—
DD
Units
and AV
ms
ms
ms
ms
μs
ns
μs
ns
ns
μs
ns
μs
s
© 2010 Microchip Technology Inc.
SS
should always be within
Conditions
See Note 2
See Note 2
See Note 2
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