PIC16C433-I/SO Microchip Technology, PIC16C433-I/SO Datasheet - Page 48
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PIC16C433-I/SO
Manufacturer Part Number
PIC16C433-I/SO
Description
IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C433-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN (Local Interconnect Network)
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC164030 - MODULE SKT PROMATEII 28DIP/SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
PIC16C433
8.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 8-2. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 8-2. The maximum recommended imped-
ance for analog sources is 10 kΩ. After the analog
input channel is selected (changed), this acquisition
must be done before the conversion can be started.
To calculate the minimum acquisition time, Equation 8-1
may be used. This equation assumes that 1/2 LSb error
is used (512 steps for the A/D). The 1/2 LSb error is the
maximum error allowed for the A/D to meet its specified
resolution.
EQUATION 8-1:
Example 8-1 shows the calculation of the minimum
required acquisition time T
based on the following system assumptions.
Rs = 10 k
1/2 LSb error
V
Temperature (system max.) = 50
V
FIGURE 8-2:
DS41139B-page 46
V
or
Tc = -(51.2 pF)(1 kΩ + R
DD
HOLD
HOLD
= 5V → Rss = 7 k
= 0 @ t = 0
= (V
A/D Sampling Requirements
Ω
REF
S
- (V
) and the internal sampling switch (R
HOLD
REF
ANALOG INPUT MODEL
Legend: C
/512)) • (1 - e
VA
. The sampling switch (R
Ω
A/D MINIMUM CHARGING
TIME
SS
R
+ R
V
I leakage
R
SS
C
S
PIN
T
IC
HOLD
S
ACQ
) ln(1/511)
RA
C
5 pF
HOLD
X
(-Tc/C
PIN
°
. This calculation is
C
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
) must be allowed
HOLD
(R
IC
+ R
V
DD
SS
DD
+ R
), see
V
V
T
T
Preliminary
S
SS
SS
= 0.6V
= 0.6V
))
)
)
)
I leakage
± 500 nA
EXAMPLE 8-1:
T
T
T
T
R
ACQ
ACQ
C
ACQ
IC
Note 1: The reference voltage (V
≤ 1k
= Internal Amplifier Settling Time +
= 5 µs + Tc + [(Temp - 25°C)(0.05 µs/°C)]
= -C
= 5 µs + 5.724 µs + [(50°C - 25°C)(0.05 µs/°C)]
2: The charge holding capacitor (C
3: The maximum recommended impedance
4: After a conversion has completed, a
Holding Capacitor Charging Time +
Temperature Coefficient
-51.2 pF (1 kΩ + 7 kΩ + 10 kΩ) ln(0.0020)
-51.2 pF (18 kΩ) ln(0.0020)
-0.921 µs (-6.2146)
5.724 µs
10.724 µs + 1.25 µs
11.974 µs
V
SS R
DD
Sampling
Switch
HOLD
effect on the equation, since it cancels
itself out.
not discharged after each conversion.
for analog sources is 10 kΩ. This is
required to meet the pin leakage specifi-
cation.
2.0 T
acquisition can begin again. During this
time, the holding capacitor is not con-
nected to the selected A/D input channel.
6V
5V
4V
3V
2V
SS
AD
(R
IC
MINIMUM REQUIRED
SAMPLE TIME
CALCULATING THE
Sampling Switch
5 6 7 8 9 10 11
delay must complete before
+ R
V
2002 Microchip Technology Inc.
SS
C
= DAC capacitance
= 51.2 pF
(kΩ)
HOLD
SS
+ R
S
) ln(1/512)
REF
) has no
HOLD
) is