PIC16LF872-I/SP Microchip Technology, PIC16LF872-I/SP Datasheet - Page 9
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PIC16LF872-I/SP
Manufacturer Part Number
PIC16LF872-I/SP
Description
IC MCU FLASH 2KX14 EE A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16C770-ISO.pdf
(8 pages)
2.PIC16F872-ISO.pdf
(168 pages)
3.PIC16F872-ISO.pdf
(5 pages)
4.PIC16F872-ISO.pdf
(6 pages)
5.PIC16LF872-ISP.pdf
(168 pages)
Specifications of PIC16LF872-I/SP
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
64Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF872-I/SP
Manufacturer:
MICROCLOCK
Quantity:
20 000
2.0
There are three memory blocks in the PIC16F872. The
Program Memory and Data Memory have separate
buses so that concurrent access can occur. Data mem-
ory is covered in this section; the EEPROM data mem-
ory and FLASH program memory blocks are detailed in
Section 3.0.
Additional information on device memory may be found
in the PICmicro™ Mid-Range Reference Manual
(DS33023).
2.1
The PIC16F872 has a 13-bit program counter capable
of addressing an 8K word x 14 bit program memory
space. The PIC16F872 device actually has 2K words of
FLASH program memory. Accessing a location above
the physically implemented address will cause a wrap-
around.
The RESET vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 2-1:
© 2006 Microchip Technology Inc.
Program
On-Chip
Memory
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
Interrupt Vector
PIC16F872 PROGRAM
MEMORY MAP AND
STACK
Stack Level 8
Stack Level 2
Reset Vector
Stack Level 1
PC<12:0>
Page 0
13
0000h
0004h
0005h
07FFh
1FFFh
2.2
The data memory is partitioned into multiple banks
which contain the General Purpose Registers and the
Special Function Registers. Bits RP1 (STATUS<6>)
and RP0 (STATUS<5>) are the bank select bits.
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM. All implemented banks contain Special
Function Registers. Some frequently used Special
Function Registers from one bank may be mirrored in
another bank for code reduction and quicker access.
2.2.1
The register file can be accessed either directly, or indi-
rectly through the File Select Register (FSR).
Note:
RP1:RP0
Data Memory Organization
EEPROM Data Memory description can be
found in Section 4.0 of this data sheet.
GENERAL PURPOSE REGISTER
FILE
00
01
10
11
PIC16F872
DS30221C-page 7
Bank
0
1
2
3