PIC18LF27J13-I/SS Microchip Technology, PIC18LF27J13-I/SS Datasheet - Page 135
PIC18LF27J13-I/SS
Manufacturer Part Number
PIC18LF27J13-I/SS
Description
IC PIC MCU 128KB FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J13-ISS.pdf
(558 pages)
4.PIC18F26J13-ISS.pdf
(12 pages)
Specifications of PIC18LF27J13-I/SS
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SSOP
Supply Voltage Range
1.8V To 3.6V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J13-ISS PDF datasheet #3
- PIC18F26J13-ISS PDF datasheet #4
- Current page: 135 of 558
- Download datasheet (5Mb)
REGISTER 9-16:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSP2IP
R/W-1
SSP2IP: Master Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP: Bus Collision Interrupt Priority bit (MSSP2 module)
1 = High priority
0 = Low priority
RC2IP: EUSART2 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX2IP: EUSART2 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
TMR4IE: TMR4 to PR4 Interrupt Priority bit
1 = High priority
0 = Low priority
CTMUIP: Charge Time Measurement Unit (CTMU) Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3GIP: Timer3 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
RTCCIP: RTCC Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP
R/W-1
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3 (ACCESS FA5h)
W = Writable bit
‘1’ = Bit is set
RC2IP
R/W-1
R/W-1
TX2IP
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F47J13 FAMILY
TMR4IP
R/W-1
CTMUIP
R/W-1
x = Bit is unknown
TMR3GIP
R/W-1
DS39974A-page 135
RTCCIP
R/W-1
bit 0
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