PIC24HJ16GP304-I/ML Microchip Technology, PIC24HJ16GP304-I/ML Datasheet - Page 184
![IC PIC MCU FLASH 16K 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ16GP304-I/ML
Manufacturer Part Number
PIC24HJ16GP304-I/ML
Description
IC PIC MCU FLASH 16K 44QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
5.PIC24HJ32GP204-IML.pdf
(244 pages)
Specifications of PIC24HJ16GP304-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
44-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ16GP304-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24HJ32GP202/204 and PIC24HJ16GP304
All instructions are single word. Ceratian of them were
made double word instructions so that all the required
information is available in these 48 bits. In the second
word, the 8 MSbs are ‘0’s. If this second word is exe-
cuted as an instruction (by itself), it will execute as a
NOP.
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true, or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all table
TABLE 19-1:
DS70289A-page 182
#text
(text)
[text]
{ }
<n:m>
.b
.d
.S
.w
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
PC
Slit10
Slit16
Slit6
Wb
Wd
Wdo
Wm,Wn
Wm*Wm
Wn
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double Word mode selection
Shadow register select
Word mode selection (default)
4-bit bit selection field (used in word addressed instructions) ∈ {0...15}
Absolute address, label or expression (resolved by the linker)
File register address ∈ {0x0000...0x1FFF}
1-bit unsigned literal ∈ {0,1}
4-bit unsigned literal ∈ {0...15}
5-bit unsigned literal ∈ {0...31}
8-bit unsigned literal ∈ {0...255}
10-bit unsigned literal ∈ {0...255} for Byte mode, {0:1023} for Word mode
14-bit unsigned literal ∈ {0...16384}
16-bit unsigned literal ∈ {0...65535}
23-bit unsigned literal ∈ {0...8388608}; LSB must be ‘0’
Field does not require an entry, may be blank
Program Counter
10-bit signed literal ∈ {-512...511}
16-bit signed literal ∈ {-32768...32767}
6-bit signed literal ∈ {-16...16}
Base W register ∈ {W0..W15}
Destination W register ∈ { Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }
Destination W register ∈
{ Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }
Dividend, Divisor working register pair (direct addressing)
Multiplicand and Multiplier working register pair for Square instructions ∈
{W4 * W4,W5 * W5,W6 * W6,W7 * W7}
One of 16 working registers ∈ {W0..W15}
Preliminary
reads and writes and RETURN/RETFIE instructions,
which are single-word instructions but take two or three
cycles. Certain instructions that involve skipping over the
subsequent instruction require either two or three cycles
if the skip is performed, depending on whether the
instruction being skipped is a single-word or double word
instruction. Moreover, double word moves require two
cycles. The double word instructions execute in two
instruction cycles.
Note:
Description
For more details on the instruction set,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
© 2007 Microchip Technology Inc.