PIC18F67J11-I/PT Microchip Technology, PIC18F67J11-I/PT Datasheet - Page 31
![IC PIC MCU FLASH 64KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67J11-I/PT
Manufacturer Part Number
PIC18F67J11-I/PT
Description
IC PIC MCU FLASH 64KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.DV164136.pdf
(448 pages)
3.DV164136.pdf
(4 pages)
4.PIC18F63J11-IPT.pdf
(36 pages)
5.PIC18F66J11-IPT.pdf
(4 pages)
6.PIC18F66J11-IPT.pdf
(4 pages)
7.PIC18F66J11-IPT.pdf
(20 pages)
Specifications of PIC18F67J11-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F67J11-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
TABLE 5-5:
2009 Microchip Technology Inc.
CFGB80 = Byte sum of [(CW1 & 07FFh) + (CW2 & 0FC7h) + (CW3 & 0FF8h)]
CFGB60 = Byte sum of [(CW1 & 07FFh) + (CW2 & 0FC7h) + (CW3 & 0900h)]
CFGB = Byte sum of [(CW1 & 04E1h) + (CW2 & 0FDFh) + (CW3 & 0102h)]
Legend: Item
Note:
PIC18F87J50
PIC18F87J90
Family
SUM(a:b) =
+
CW
CFGB
CW3 address is the last location – 2 of implemented program memory; CW2 is the last location – 4;
CW1 is the last location – 6.
CHECKSUM EQUATION FOR PIC18F6XJXX/8XJXX (CONTINUED)
=
=
=
PIC18F65J50
PIC18F65J55
PIC18F66J50
PIC18F66J55
PIC18F67J50
PIC18F85J50
PIC18F85J55
PIC18F86J50
PIC18F86J55
PIC18F87J50
PIC18F66J90
PIC18F66J93
PIC18F67J90
PIC18F67J93
PIC18F86J72
PIC18F86J90
PIC18F86J93
PIC18F87J72
PIC18F87J90
PIC18F87J93
Description
Byte sum of locations a to b inclusive (all 3 bytes of code memory)
Addition
Configuration Word
Configuration Block (Masked)
Device
Read Code Protection
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
PIC18F6XJXX/8XJXX
CFGB60 + SUM(00000:17FF7h)
CFGB60 + SUM(00000:1FFF7h)
CFGB80 + SUM(00000:17FF7h)
CFGB80 + SUM(00000:1FFF7h)
CFGB60 + SUM(0000:BFF7h)
CFGB60 + SUM(0000:FFF7h)
CFGB80 + SUM(0000:BFF7h)
CFGB80 + SUM(0000:FFF7h)
CFGB + SUM(00000:1FFF7h)
CFGB60 + SUM(0000:7FF7h)
CFGB80 + SUM(0000:7FF7h)
CFGB + SUM(0000:1FFF7h)
CFGB + SUM(0000:1FFF7h)
CFGB + SUM(00000:FFF7h)
CFGB + SUM(0000:1FFF7h)
CFGB + SUM(0000:1FFF7h
CFGB + SUM(0000:FFF7h)
CFGB + SUM(0000:FFF7h)
CFGB + SUM(0000:FFF7h)
CFGB + SUM(0000:FFF7h)
Checksum Computation
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
DS39644L-page 31