PIC24FJ64GA002-I/ML Microchip Technology, PIC24FJ64GA002-I/ML Datasheet - Page 10

• Manufacturer Part Number: PIC24FJ64GA002-I/ML
• Description: IC PIC MCU FLASH 21KX24 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA002-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24F Family Reference Manual
30.6
30.7
DS39714A-page 30-10
ADVANTAGES OF PROGRAMMABLE CRC MODULE
APPLICATION OF CRC MODULE
The CRC algorithm is straightforward to implement in software. However, it requires
considerable CPU bandwidth to implement the basic requirements, such as shift, bit test and
XOR. Moreover, CRC calculation is an iterative process and additional software overhead for
data transfer instructions puts enormous burden on the MIPS requirement of a microcontroller.
The CRC engine in PIC24F devices calculates the CRC checksum without CPU intervention.
Moreover, it is much faster than the software implementation; the CRC engine consumes only
half of an instruction cycle per bit for its calculation as the frequency of the CRC shift clock is
twice that of the PIC24F instruction clock cycle. For example, the CRC hardware engine takes
only 64 instruction cycles to calculate a CRC checksum on a message that is 128 bits (16x8)
long. The same calculation, if implemented in software, will consume more than a thousand
instruction cycles even for a well optimized piece of code.
Calculating a CRC is a robust error checking algorithm in digital communication for messages
containing several bytes or words. After calculation, the checksum is appended to the message
and transmitted to the receiving station. The receiver calculates the checksum with the received
message to verify the data integrity.
30.7.1
The CRC module of PIC24F devices shifts out the Most Significant bit first. This is a popular
implementation as employed in XMODEM protocol. In one of the variations (CCITT protocol) for
CRC calculation, the Least Significant bit is shifted out first. This requires bit reversal of the
message polynomial in the software before feeding the message to the PIC24F CRC hardware
module, and this also adds considerable software overhead. Discussions on all the variations are
beyond the scope of this document, but several variations of CRC can be implemented using the
programmable CRC module in PIC24F devices with minimal software overhead.
The choice of the polynomial length, and the polynomial itself, are application dependent.
Polynomial lengths of 5, 7, 8, 10, 12 and 16 are normally used in various standard
implementations. The CRC module in PIC24F devices can be configured for different polynomial
lengths and for different equations. If a polynomial of n bits is selected for calculation, normally
n zeros are appended to the message stream, though there are variations in this process as well.
The following sections explain the recommended step-by-step procedure for CRC calculation,
where n zeros are appended to the message stream for an n bit polynomial. Users can decide
whether zeros, or any other values, need to be appended to the message stream. Depending on
the application, the user may decide whether any value needs to be appended at all.
30.7.2
The recommended procedure to calculate a CRC with an 8-bit polynomial is as follows:
1.
2.
3.
4.
5.
6.
7.
8.
Program PLEN3:PLEN0 bits (CRCCON<3:0>) = 07h.
Program a value to CRCXOR (e.g., CRCXOR = 31h).
Program a value in CRCWDAT:
• 0000h (for the start of a new calculation), or
• the previously calculated partial result, (for part of the whole message stream).
If the CRCFUL bit is not set and if all the data bytes of the message stream are not written
into the FIFO, then write a data byte to the CRCDAT register.
If the CRCFUL bit is not set, and if all the data bytes of the message stream have already
been written into the FIFO, then write a byte of 00h in the CRCDAT register and set a
software flag bit in the application using the CRC (i.e., FINAL_CALCULATION).
If the CRCFUL bit or the software FINAL_CALCULATION flag is set, then start CRC by
setting the CRCGO bit.
When CRCMPT is set, clear the CRCGO bit and read the result byte from the CRCWDAT
register.
For a partial result (CRC calculation is done but the FINAL_CALCULATION flag is not set),
pass the partial result to the next calculation process.
Variations
8-Bit Polynomial
Advance Information
© 2006 Microchip Technology Inc.