DSPIC33FJ32MC202-I/MM Microchip Technology, DSPIC33FJ32MC202-I/MM Datasheet - Page 156
![IC DSPIC MCU/DSP 32K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ32MC202-I/MM
Manufacturer Part Number
DSPIC33FJ32MC202-I/MM
Description
IC DSPIC MCU/DSP 32K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
4.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
5.DSPIC33FJ32MC204-IPT.pdf
(304 pages)
Specifications of DSPIC33FJ32MC202-I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC202-I/MM
Manufacturer:
Microchip
Quantity:
1 485
Part Number:
DSPIC33FJ32MC202-I/MM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- DSPIC33FJ32MC302-ISO PDF datasheet #4
- DSPIC33FJ32MC204-IPT PDF datasheet #5
- Current page: 156 of 320
- Download datasheet (5Mb)
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
14.1
Configure the Output Compare modes by setting the
appropriate Output Compare Mode bits (OCM<2:0>) in
the Output Compare Control register (OCxCON<2:0>).
Table 14-1
Compare modes.
compare operation for various modes. The user
TABLE 14-1:
FIGURE 14-2:
DS70283H-page 156
OCM<2:0>
Continuous Pulse Mode
000
001
010
011
100
101
110
111
Active-High One-Shot
Active-Low One-Shot
(OCM = 110 or 111)
Delayed One-Shot
Output Compare Modes
lists the different bit settings for the Output
(OCM = 011)
(OCM = 100)
Toggle Mode
(OCM = 101)
(OCM = 001)
(OCM = 010)
PWM Mode
Module Disabled
Active-Low One-Shot
Active-High One-Shot
Toggle Mode
Delayed One-Shot
Continuous Pulse mode
PWM mode without fault
protection
PWM mode with fault protection 0, if OCxR is zero
OUTPUT COMPARE MODES
TMRy
Figure 14-2
OUTPUT COMPARE OPERATION
OCxRS
OCxR
Mode
Output Compare
Mode enabled
illustrates the output
Current output is maintained
0, if OCxR is zero
1, if OCxR is non-zero
1, if OCxR is non-zero
Controlled by GPIO register
OCx Pin Initial State
Timer is reset on
period match
0
1
0
0
application must disable the associated timer when
writing to the output compare control registers to avoid
malfunctions.
Note:
See Section 13. “Output Compare”
(DS70209) in the “dsPIC33F/PIC24H
Family Reference Manual” (DS70209) for
OCxR and OCxRS register restrictions.
OCx Rising edge
OCx Falling edge
OCx Rising and Falling edge
OCx Falling edge
OCx Falling edge
No interrupt
OCFA Falling edge for OC1 to OC4
OCx Interrupt Generation
© 2011 Microchip Technology Inc.
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