PIC16F737-I/SS Microchip Technology, PIC16F737-I/SS Datasheet - Page 105

IC PIC MCU FLASH 4KX14 28SSOP

PIC16F737-I/SS

Manufacturer Part Number
PIC16F737-I/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F737-I/SS

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16F
No. Of I/o's
25
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI, USART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF777 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F737-I/SS
Manufacturer:
MIC
Quantity:
50
Part Number:
PIC16F737-I/SS
Manufacturer:
MICRO
Quantity:
33
Part Number:
PIC16F737-I/SS
Manufacturer:
MIC
Quantity:
20 000
REGISTER 10-3:
 2004 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSPSTAT: MSSP STATUS (I
bit 7
SMP: Slew Rate Control bit
In Master or Slave mode:
1 = Slew rate control disabled for Standard Speed mode (100 kHz and 1 MHz)
0 = Slew rate control enabled for High-Speed mode (400 kHz)
CKE: SMBus Select bit
In Master or Slave mode:
1 = Enable SMBus specific inputs
0 = Disable SMBus specific inputs
D/A: Data/Address bit
In Master mode:
Reserved.
In Slave mode:
1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address
P: Stop bit
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
S: Start bit
1 = Indicates that a Start bit has been detected last
0 = Start bit was not detected last
R/W: Read/Write bit Information bit (I
In Slave mode:
1 = Read
0 = Write
In Master mode:
1 = Transmit is in progress
0 = Transmit is not in progress
UA: Update Address bit (10-bit Slave mode only)
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
BF: Buffer Full Status bit
In Transmit mode:
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
In Receive mode:
1 = Data transmit in progress (does not include the ACK and Stop bits), SSPBUF is full
0 = Data transmit complete (does not include the ACK and Stop bits), SSPBUF is empty
Legend:
R = Readable bit
-n = Value at POR
R/W-0
Note:
Note:
Note:
Note:
SMP
This bit is cleared on Reset and when SSPEN is cleared.
This bit is cleared on Reset and when SSPEN is cleared.
This bit holds the R/W bit information following the last address match. This bit is
only valid from the address match to the next Start bit, Stop bit or not ACK bit.
ORing this bit with SEN, RSEN, PEN, RCEN or ACKEN will indicate if the MSSP is
in Idle mode.
R/W-0
CKE
R-0
D/A
W = Writable bit
‘1’ = Bit is set
2
C MODE) REGISTER (ADDRESS 94h)
2
C mode only)
R-0
P
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-0
S
R/W
R-0
PIC16F7X7
x = Bit is unknown
R-0
UA
DS30498C-page 103
R-0
BF
bit 0

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