T89C51CC02CA-TDSIM Atmel, T89C51CC02CA-TDSIM Datasheet - Page 76

• Manufacturer Part Number: T89C51CC02CA-TDSIM
• Description: IC 8051 MCU FLASH 16K 24SOIC
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of T89C51CC02CA-TDSIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-SOIC (7.5mm Width)
• For Use With: AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: T89C51CC02CATDSIM

bit Timing and Baud Rate
Figure 36. Sample and Transmission Point
76
T89C51CC02
CLOCK
FCAN
Prescaler BRP
To enable an interrupt on Buffer-full condition:
•
•
To enable an interrupt when Timer overruns:
•
When an interrupt occurs, the corresponding message object bit is set in the SIT
register.
To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or
CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error
will also be raised. Consequently, two consecutive interrupts can occur, both due to the
same error.
When a message object error occurs and is set in CANSTCH register, no general error
are set in CANGIE register.
The baud rate selection is made by Tbit calculation:
Tbit = Tsyns + Tprs + Tphs1 + Tphs2
1. Tsyns = Tscl = (BRP[5..0]+ 1)/Fcan = 1TQ
2. Tprs = (1 to 8) * Tscl = (PRS[2..0]+ 1) * Tscl
3. Tphs1 = (1 to 8) * Tscl = (PHS1[2..0]+ 1) * Tscl
4. Tphs2 = (1 to 8) * Tscl = (PHS2[2..0]+ 1) * Tscl
5. Tsjw = (1 to 4) * Tscl = (SJW[1..0]+ 1) * Tscl
The total number of Tscl (Time Quanta) in a bit time must be comprised between 8 to
25.
Enable General CAN IT in the interrupt system register
Enable interrupt on Buffer full, ENBUF
Enable Overrun IT in the interrupt system register
System Clock Tscl
Time Quantum
PRS 3bit length
PHS1 3bit length
PHS2 3bit length
SJW 2-bit length
bit Timing
Sample Point
Transmission Point
4126F–CAN–12/03