PIC24HJ64GP206-I/PT Microchip Technology, PIC24HJ64GP206-I/PT Datasheet - Page 21
![IC PIC MCU FLASH 32KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24HJ64GP206-I/PT
Manufacturer Part Number
PIC24HJ64GP206-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206-IPT.pdf
(292 pages)
3.PIC24HJ64GP206-IPT.pdf
(8 pages)
4.PIC24HJ64GP206-IPT.pdf
(20 pages)
5.PIC24HJ64GP206-IPT.pdf
(26 pages)
6.PIC24HJ128GP206-IPT.pdf
(286 pages)
7.PIC24HJ128GP306-IPT.pdf
(288 pages)
Specifications of PIC24HJ64GP206-I/PT
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
13
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 18 Channel
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
13
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Height
1 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP206-I/PT
Manufacturer:
Microchi
Quantity:
297
Company:
Part Number:
PIC24HJ64GP206-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC24HJ64GP206-I/PT
Manufacturer:
MICROCHIP
Quantity:
642
Company:
Part Number:
PIC24HJ64GP206-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24HJ64GP206-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
54. Module: ECAN
55. Module: I
© 2010 Microchip Technology Inc.
The WAKIF bit in the CxINTF register cannot be
cleared by software instruction after the device is
interrupted from Sleep by activity on the CAN bus.
When the device wakes up from Sleep due to CAN
bus activity, the ECAN module is placed in
operational mode. The ECAN event interrupt
occurs due to the WAKIF flag. Attempts to clear
the flag in the Interrupt Service Routine may not
clear the flag. The WAKIF bit being set will not
cause
execution.
Work around
Although the WAKIF bit does not clear, the device
Sleep and ECAN Wake function continue to work
as expected. If the ECAN event is enabled, the
CPU will enter the Interrupt Service Routine due to
the WAKIF flag getting set. The application can
maintain a secondary flag, which tracks the device
Sleep and Wake events.
Affected Silicon Revisions
When the I
after the ACKSTAT bit is set when receiving a
NACK from the slave, it may be cleared by the
reception of a Start or Stop bit.
Work around
Store the value of the ACKSTAT bit immediately
after receiving a NACK from the master.
Affected Silicon Revisions
A2
A2
X
X
A3
A3
X
X
repetitive
2
2
C module is operating in Master mode,
C
A4
A4
X
X
Interrupt
Service
Routine
PIC24HJXXXGPX06/X08/X10
56. Module: SPI
57. Module: UART
Writing to the SPIxBUF register as soon as the
TBF bit is cleared will cause the SPI module to
ignore the written data. Applications which use SPI
with DMA will not be affected by this erratum.
Work around
After the TBF bit is cleared, wait for a minimum
duration of one SPI Clock before writing to the
SPIxBUF register.
Alternately, do one of the following:
• Poll the RBF bit and wait for it to get set before
• Poll the SPI Interrupt flag and wait for it to get
• Use an SPI Interrupt Service Routine (ISR)
• Use DMA
Affected Silicon Revisions
The UART module will not generate consecutive
break characters. Trying to perform a back-to-back
Break character transmission will cause the UART
module to transmit the dummy character that is
used to generate the first Break character instead
of transmitting the second Break character. Break
characters are generated correctly if they are
followed by a non-Break character transmission.
Work around
None.
Affected Silicon Revisions
A2
A2
writing to the SPIxBUF register
set before writing to the SPIxBUF register
X
X
A3
A3
X
X
A4
A4
X
X
DS80444D-page 21