PIC16LF873A-I/SP Microchip Technology, PIC16LF873A-I/SP Datasheet - Page 121

IC MCU FLASH 4KX14 EE A/D 28DIP

PIC16LF873A-I/SP

Manufacturer Part Number
PIC16LF873A-I/SP
Description
IC MCU FLASH 4KX14 EE A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16LF873A-I/SP

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
128Byte
Ram Memory Size
192Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16LF873AI/SP
10.2.3
When setting up an Asynchronous Reception with
address detect enabled:
• Initialize the SPBRG register for the appropriate
• Enable the asynchronous serial port by clearing
• If interrupts are desired, then set enable bit RCIE.
• Set bit RX9 to enable 9-bit reception.
• Set ADDEN to enable address detect.
• Enable the reception by setting enable bit CREN.
FIGURE 10-6:
 2003 Microchip Technology Inc.
baud rate. If a high-speed baud rate is desired,
set bit BRGH.
bit SYNC and setting bit SPEN.
F
OSC
RC7/RX/DT
SETTING UP 9-BIT MODE WITH
ADDRESS DETECT
Baud Rate Generator
x64 Baud Rate CLK
USART RECEIVE BLOCK DIAGRAM
SPBRG
and Control
Pin Buffer
SPEN
RSR<8>
ADDEN
ADDEN
RX9
RX9
Recovery
Interrupt
Data
or
64
16
CREN
Enable
Load of
Receive
Buffer
RCIF
RCIE
• Flag bit RCIF will be set when reception is
• Read the RCSTA register to get the ninth bit and
• Read the 8-bit received data by reading the
• If any error occurred, clear the error by clearing
• If the device has been addressed, clear the
RX9
complete, and an interrupt will be generated if
enable bit RCIE was set.
determine if any error occurred during reception.
RCREG register to determine if the device is
being addressed.
enable bit CREN.
ADDEN bit to allow data bytes and address bytes
to be read into the receive buffer and interrupt the
CPU.
Stop
MSb
RX9D
(8)
OERR
7
RSR Register
RCREG Register
8
PIC16F87XA
Data Bus
8
8
1
FERR
0
LSb
Start
FIFO
DS39582B-page 119

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