PIC16LF84-04/P Microchip Technology, PIC16LF84-04/P Datasheet

IC MCU FLASH 1KX14 EE 18DIP

PIC16LF84-04/P

Manufacturer Part Number
PIC16LF84-04/P
Description
IC MCU FLASH 1KX14 EE 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16LF84-04/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 6 V
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
4MHz
No. Of
RoHS Compliant
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16LC84A-04/P
High Performance RISC CPU Features:
• Only 35 single word instructions to learn
• All instructions single cycle (400 ns @ 10 MHz)
• Operating speed: DC - 10 MHz clock input
• 14-bit wide instructions
• 8-bit wide data path
• 1K x 14 EEPROM program memory
• 36 x 8 general purpose registers (SRAM)
• 64 x 8 on-chip EEPROM data memory
• 15 special function hardware registers
• Eight-level deep hardware stack
• Direct, indirect and relative addressing modes
• Four interrupt sources:
• 1,000,000 data memory EEPROM
• EEPROM Data Retention > 40 years
Peripheral Features:
• 13 I/O pins with individual direction control
• High current sink/source for direct LED drive
• TMR0: 8-bit timer/counter with 8-bit
Special Microcontroller Features:
• Power-on Reset (POR)
• Power-up Timer (PWRT)
• Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
• Code protection
• Power saving SLEEP mode
• Selectable oscillator options
• Serial In-System Programming - via two pins
M
except for program branches which are two-cycle
- External RB0/INT pin
- TMR0 timer overflow
- PORTB<7:4> interrupt on change
- Data EEPROM write complete
ERASE/WRITE cycles
- 25 mA sink max. per pin
- 20 mA source max. per pin
programmable prescaler
oscillator for reliable operation
1997 Microchip Technology Inc.
DC - 400 ns instruction cycle
8-bit CMOS EEPROM Microcontroller
Pin Diagram
CMOS Technology:
• Low-power, high-speed CMOS EEPROM
• Fully static design
• Wide operating voltage range:
• Low power consumption:
technology
- Commercial: 2.0V to 6.0V
- Industrial:
- < 2 mA typical @ 5V, 4 MHz
- 60 A typical @ 2V, 32 kHz
- 26 A typical standby current @ 2V
RA4/T0CKI
PDIP, SOIC
RB0/INT
MCLR
RA2
RA3
RB1
RB2
RB3
V
SS
PIC16C84
2.0V to 6.0V
2
3
4
5
6
7
8
9
1
18
17
16
15
14
13
12
11
10
DS30445C-page 1
RA1
RA0
OSC1/CLKIN
OSC2/CLKOUT
V
RB7
RB6
RB5
RB4
DD

Related parts for PIC16LF84-04/P

PIC16LF84-04/P Summary of contents

Page 1

... Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation • Code protection • Power saving SLEEP mode • Selectable oscillator options • Serial In-System Programming - via two pins 1997 Microchip Technology Inc. PIC16C84 Pin Diagram PDIP, SOIC RA2 1 ...

Page 2

... However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please use the reader response form in the back of this data sheet to inform us. We appreciate your assistance in making this a better document. DS30445C-page 2 1997 Microchip Technology Inc. ...

Page 3

... Table 1-1 lists the features of the PIC16C84. A simpli- fied block diagram of the PIC16C84 is shown in Figure 3-1. 1997 Microchip Technology Inc. PIC16C84 The PIC16C84 fits perfectly in applications ranging from high speed automotive and appliance motor control to low-power remote sensors, electronic locks, security devices and smart cards ...

Page 4

... All PIC16C8X Family devices use serial programming with clock pin RB6 and data pin RB7. DS30445C-page 4 PIC16F83 PIC16CR83 PIC16F84 512 — 1K — — — — 512 — TMR0 TMR0 TMR0 2.0-6.0 2.0-6.0 2.0-6.0 18-pin DIP, 18-pin DIP, 18-pin DIP, SOIC SOIC SOIC PIC16CR84 10 — — TMR0 4 13 2.0-6.0 18-pin DIP, SOIC 1997 Microchip Technology Inc. ...

Page 5

... This allows the same device to be used for prototype development and pilot programs as well as production. A further advantage of the electrically erasable version is that they can be erased and reprogrammed in-circuit device programmers, such as Microchip's PICSTART Plus or PRO MATE II programmers. 1997 Microchip Technology Inc. Product PIC16C84 DS30445C-page 5 ...

Page 6

... PIC16C84 NOTES: DS30445C-page 6 1997 Microchip Technology Inc. ...

Page 7

... In addition, the learning curve is reduced significantly. The PIC16C84 has SRAM and EEPROM data memory. 1997 Microchip Technology Inc. PIC16C84 PIC16CXX devices contain an 8-bit ALU and working register. The ALU is a general purpose arithmetic unit. It performs arithmetic and Boolean functions between data in the working register and any register fi ...

Page 8

... OSC1/CLKIN DS30445C-page 8 Data Bus 8 RAM File Registers RAM Addr Addr Mux 7 Indirect Direct Addr Addr FSR reg STATUS reg 8 MUX ALU W reg EEPROM Data Memory EEPROM EEDATA Data Memory EEADR TMR0 RA4/T0CKI I/O Ports RA3:RA0 RB7:RB1 RB0/INT 1997 Microchip Technology Inc. ...

Page 9

... O = output — = Not used Note 1: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 2: This buffer is a Schmitt Trigger input when used in serial programming mode. 1997 Microchip Technology Inc. Buffer Description Type (1) I ST/CMOS Oscillator crystal input/external clock source input ...

Page 10

... Q2, Q3, and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write PC+1 Fetch INST (PC+1) Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch Internal phase clock PC+2 Fetch INST (PC+2) Execute INST (PC+1) Flush Fetch SUB_1 Execute SUB_1 1997 Microchip Technology Inc. ...

Page 11

... For example, locations 20h, 420h, 820h, C20h, 1020h, 1420h, 1820h, and 1C20h will be the same instruction. The reset vector is at 0000h and the interrupt vector is at 0004h. 1997 Microchip Technology Inc. PIC16C84 FIGURE 4-1: PROGRAM MEMORY MAP AND STACK PC<12:0> ...

Page 12

... General Mapped Purpose (accesses) registers in Bank 0 (SRAM) 2Fh 30h 7Fh Bank 0 Bank 1 Unimplemented data memory location; read as '0'. Note 1: Not a physical register. 1997 Microchip Technology Inc. File Address (1) 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch ...

Page 13

... PCLATH can be transferred to the upper byte of the program counter, but the contents of PC<12:8> is never transferred to PCLATH. 2: The TO and PD status bits in the STATUS register are not affected by a MCLR reset. 3: Other (non power-up) resets include: external reset through MCLR and the Watchdog Timer Reset. 1997 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 ...

Page 14

... bits, then the write to these three bits is disabled. The specified bit(s) will be updated according to device logic R-1 R/W-x R/W-x R/W bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1997 Microchip Technology Inc. ...

Page 15

... Bit Value TMR0 Rate WDT Rate 000 001 010 011 100 101 110 1 : 128 111 1 : 256 1997 Microchip Technology Inc. Note: When the prescaler is assigned to the WDT (PSA = '1'), TMR0 has a 1:1 prescaler assignment. R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 ...

Page 16

... Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON<7>). R/W-0 R/W-0 R/W-0 R/W-x RBIE T0IF INTF RBIF bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1997 Microchip Technology Inc. ...

Page 17

... Therefore, manipula- tion of the PCLATH<4:3> is not required for the return instructions (which “pops” the PC from the stack). 1997 Microchip Technology Inc. Note: The PIC16C84 ignores the PCLATH<4:3> bits, which are used for program memory pages 1, 2 and 3 (0800h - 1FFFh). The use of PCLATH< ...

Page 18

... Bank 0 Bank 1 Bank 2 Bank 3 HOW TO CLEAR RAM USING INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ; to RAM INDF ;clear INDF register FSR ;inc pointer FSR,4 ;all done? NEXT ;NO, clear next ;YES, continue Indirect Addressing 7 (FSR) 0 location select 00h 7Fh 1997 Microchip Technology Inc. ...

Page 19

... Port CK Q Data Latch TRIS CK Q TRIS Latch TTL input buffer RD TRIS PORT Note: I/O pins have protection diodes 1997 Microchip Technology Inc. EXAMPLE 5-1: CLRF PORTA BSF STATUS, RP0 MOVLW 0x0F MOVWF TRISA FIGURE 5-2: Data bus WR PORT WR TRIS PORT N ...

Page 20

... Input/output or external clock input for TMR0. Output is open drain type. Bit 5 Bit 4 Bit 3 Bit 2 — RA4/T0CKI RA3 RA2 — TRISA4 TRISA3 TRISA2 TRISA1 Value on Value on all Bit 1 Bit 0 Power-on other resets Reset RA1 RA0 ---x xxxx ---u uuuu TRISA0 ---1 1111 ---1 1111 1997 Microchip Technology Inc. ...

Page 21

... EN Note 1: TRISB = '1' enables weak pull-up (if RBPU = '0' in the OPTION_REG register). 2: I/O pins have diode protection 1997 Microchip Technology Inc. This interrupt can wake the device from SLEEP. The user, in the interrupt service routine, can clear the interrupt in the following manner: a) Read (or write) PORTB. This will end the mis- match condition ...

Page 22

... RB4 RB3 RB2 TRISB4 TRISB3 TRISB2 TRISB1 T0CS T0SE PSA PS2 Value on Value on all Bit 1 Bit 0 Power-on other resets Reset RB1 RB0/INT xxxx xxxx uuuu uuuu TRISB0 1111 1111 1111 1111 1111 1111 1111 1111 PS1 PS0 1997 Microchip Technology Inc. ...

Page 23

... RB7:RB0 Instruction executed MOVWF PORTB write to PORTB 1997 Microchip Technology Inc. 5.3.2 SUCCESSIVE OPERATIONS ON I/O PORTS The actual write to an I/O port happens at the end of an instruction cycle, whereas for reading, the data must be valid at the beginning of the instruction cycle (Figure 5- 5) ...

Page 24

... PIC16C84 NOTES: DS30445C-page 24 1997 Microchip Technology Inc. ...

Page 25

... TMR0 T0 T0+1 Instruction Executed 1997 Microchip Technology Inc. edge select bit, T0SE (OPTION<4>). Clearing bit T0SE selects the rising edge. Restrictions on the external clock input are discussed in detail in Section 6.2. The prescaler is shared between the Timer0 Module and the Watchdog Timer. The prescaler assignment is ...

Page 26

... Q3 Q4 FFh 00h 1 (2) Interrupt Latency Inst (PC+1) Inst (PC) Dummy cycle PC+4 PC+5 PC+6 MOVF TMR0,W NT0+1 Read TMR0 Read TMR0 reads NT0 reads NT0 + 01h 02h 0004h 0005h Inst (0004h) Inst (0005h) Dummy cycle Inst (0004h) 1997 Microchip Technology Inc. ...

Page 27

... External clock if no prescaler selected, Prescaler output otherwise. 3: The arrows indicate where sampling occurs. A small clock pulse may be missed by sampling. 1997 Microchip Technology Inc. 6.2.2 TMR0 INCREMENT DELAY Since the prescaler output is synchronized with the internal clocks, there is a small delay from the time the ...

Page 28

... X Watchdog Timer PSA WDT Enable bit Note: T0CS, T0SE, PSA, PS2:PS0 are bits in the OPTION register. DS30445C-page SYNC Cycles PSA 8-bit Prescaler 1MUX PS2:PS0 PSA WDT time-out Data Bus 8 TMR0 register Set bit T0IF on overflow 1997 Microchip Technology Inc. ...

Page 29

... GIE EEIE 81h OPTION RBPU INTEDG 85h TRISA — — Legend unknown unchanged unimplemented read as '0'. Shaded cells are not associated with Timer0. 1997 Microchip Technology Inc. EXAMPLE 6-1: BCF STATUS, RP0 CLRF TMR0 BSF STATUS, RP0 CLRWDT sequence MOVLW b'xxxx1xxx' ...

Page 30

... PIC16C84 NOTES: DS30445C-page 30 1997 Microchip Technology Inc. ...

Page 31

... Initiates an EEPROM read (read takes one cycle cleared in hardware. The RD bit can only be set (not cleared) in software Does not initiate an EEPROM read 1997 Microchip Technology Inc. When the device is code protected, the CPU may continue to read and write the data EEPROM memory. ...

Page 32

... The data EEPROM memory E/W cycle time may occasionally exceed the 10 ms specification (typical). To ensure that the write cycle is complete, use the EE interrupt or poll the WR bit (EECON1<1>). Both these events signify the completion of the write cycle. 1997 Microchip Technology Inc. ...

Page 33

... EECON2 EEPROM control register 2 Legend unknown unchanged unimplemented read as '0 value depends upon condition. Shaded cells are not used by Data EEPROM. 1997 Microchip Technology Inc. 7.6 Protection Against Spurious Writes There are conditions when the device may not want to write to the data EEPROM memory. To protect against spurious EEPROM writes, various mechanisms have been built in ...

Page 34

... PIC16C84 NOTES: DS30445C-page 34 1997 Microchip Technology Inc. ...

Page 35

... FOSC1:FOSC0: Oscillator Selection bits 11 =RC oscillator oscillator oscillator oscillator 1997 Microchip Technology Inc. the chip in reset until the crystal oscillator is stable. The other is the Power-up Timer (PWRT), which provides a fixed delay (nominal) on power-up only. This design keeps the device in reset while the power supply stabilizes ...

Page 36

... FOR CRYSTAL OSCILLATOR Freq OSC1/C1 OSC2/ 100 100 100 - 150 pF 100 - 150 > 4.5V recommended. 20 PPM Epson C-2 100.00 KC-P 20 PPM STD XTL 200.000 KHz 20 PPM ECS ECS-10-13-2 50 PPM ECS ECS-20-S-2 50 PPM ECS ECS-40-S-4 50 PPM ECS ECS-100-S-4 50 PPM 1997 Microchip Technology Inc. ...

Page 37

... F XTAL 1997 Microchip Technology Inc. 8.2.4 RC OSCILLATOR For timing insensitive applications the RC device option offers additional cost savings. The RC oscillator frequency is a function of the supply voltage, the resistor (Rext) values, capacitor (Cext) values, and the operating temperature ...

Page 38

... Table 8-4 gives a full description of reset states for all registers. The TO and PD bits are set or cleared differently in dif- ferent reset situations (Section 8.7). These bits are used in software to determine the nature of the reset Enable PWRT See Table 8-5 Enable OST 1997 Microchip Technology Inc. Chip_Reset Q ...

Page 39

... Note 1: One or more bits in INTCON will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: Table 8-3 lists the reset value for each specific condition. 1997 Microchip Technology Inc. Program Counter 000h 000h ...

Page 40

... A). A larger voltage drop will degrade 100 will limit any current flowing into MCLR from external capacitor C in the event of an MCLR pin breakdown due to ESD or EOS. POWER-UP MCLR PIC16CXX C power-up rate is too slow. The DD powers down. DD level on the MCLR pin. IH 1997 Microchip Technology Inc. ...

Page 41

... TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 8-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 1997 Microchip Technology Inc. PIC16C84 ): CASE PWRT T OST ): CASE PWRT T OST DS30445C-page 41 ...

Page 42

... T DD has reached its final value. In this example, the chip will reset properly if, and only if, V1 DS30445C-page 42 ): FAST PWRT T OST ): SLOW PWRT T OST time-out and T time-out will expire before V PWRT OST V min. DD 1997 Microchip Technology Inc. RISE TIME DD RISE TIME DD DD ...

Page 43

... MCLR Reset during SLEEP or interrupt 1 0 wake-up from SLEEP 1997 Microchip Technology Inc. 8.8 Reset on Brown-Out A brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. ...

Page 44

... Ensure that the GIE bit is cleared by the instruction, as shown in the following code: LOOP BCF INTCON,GIE ;Disable All ; Interrupts BTFSC INTCON,GIE ;All Interrupts ; Disabled? GOTO LOOP ;NO, try again ; Yes, continue ; with program ; flow 1997 Microchip Technology Inc. of their to the Routine ...

Page 45

... Latency is the same whether Inst (PC single cycle or a 2-cycle instruction. 3: CLKOUT is available only in RC oscillator mode. 4: For minimum width of INT pulse, refer to AC specs. 5: INTF is enabled to be set anytime during the Q4-Q1 cycles. 1997 Microchip Technology Inc. Wake-up (If in SLEEP mode) Interrupt to CPU ...

Page 46

... Stores the STATUS register in STATUS_TEMP. c) Executes the Interrupt Service Routine code. d) Restores the STATUS (and bank select bit) register. e) Restores the W register. should configure Bank as required (sets bank to original state) ; Swap nibbles in W_TEMP and place result into W 1997 Microchip Technology Inc. ...

Page 47

... RBPU INTEDG REG Legend unknown. Shaded cells are not used by the WDT. 1997 Microchip Technology Inc. part (see DC specs). If longer time-out periods are desired, a prescaler with a division ratio 1:128 can be assigned to the WDT under software control by writing to the OPTION_REG register. Thus, time-out periods ...

Page 48

... In cases where the execution of the instruction following SLEEP is not desirable, the user should have a NOP after the SLEEP instruction (2) OST Interrupt Latency (Note 2) Processor in SLEEP PC+2 PC Inst( Dummy cycle Inst( 0004h 0005h Inst(0004h) Inst(0005h) Dummy cycle Inst(0004h) 1997 Microchip Technology Inc. ...

Page 49

... Only the 4 least significant bits of ID location are usable. For ROM devices, these values are submitted along with the ROM code. 1997 Microchip Technology Inc. 8.15 In-Circuit Serial Programming PIC16C84 microcontrollers programmed while in the end application circuit ...

Page 50

... PIC16C84 NOTES: DS30445C-page 50 1997 Microchip Technology Inc. ...

Page 51

... Assigned to < > Register bit field In the set of i User defined term (font is courier) talics 1998 Microchip Technology Inc. PIC16C84 The instruction set is highly orthogonal and is grouped into three basic categories: • Byte-oriented operations • Bit-oriented operations • Literal and control operations ...

Page 52

... TO PD 0000 0110 0100 , 1kkk kkkk kkkk Z 1000 kkkk kkkk 00xx kkkk kkkk 0000 0000 1001 01xx kkkk kkkk 0000 0000 1000 TO PD 0000 0110 0011 , C,DC,Z 110x kkkk kkkk Z 1010 kkkk kkkk 1998 Microchip Technology Inc. ...

Page 53

... Q1 Q2 Decode Read Process register 'f' Example ADDWF FSR, 0 Before Instruction W = 0x17 FSR = 0xC2 After Instruction W = 0xD9 FSR = 0xC2 1998 Microchip Technology Inc. ANDLW Syntax: Operands: Operation: Status Affected: Encoding: kkkk kkkk Description: . Words: Cycles: Q Cycle Activity Write to data W Example ANDWF Syntax: ...

Page 54

... Read Process No-Operat register 'f' data ion (2nd Cycle No-Operati No-Opera No-Operat No-Operat on tion ion ion HERE BTFSC FLAG,1 FALSE GOTO PROCESS_CODE • TRUE • • Before Instruction PC = address HERE After Instruction if FLAG<1> address TRUE if FLAG<1>= address FALSE 1998 Microchip Technology Inc. ...

Page 55

... FLAG,1 FALSE GOTO PROCESS_CODE • TRUE • • Before Instruction PC = address HERE After Instruction if FLAG<1> address FALSE if FLAG<1> address TRUE 1998 Microchip Technology Inc. CALL Syntax: Operands: Operation: Status Affected: bfff ffff Encoding: Description: instruction. CY Words Cycles: Process No-Operat Q Cycle Activity: ...

Page 56

... CLRWDT instruction resets the Watch- dog Timer. It also resets the prescaler of the WDT. Status bits TO and PD are set Decode No-Opera Process Clear tion data WDT Counter CLRWDT Before Instruction WDT counter = ? After Instruction WDT counter = 0x00 WDT prescaler 1998 Microchip Technology Inc. ...

Page 57

... Q Cycle Activity Decode Read Process register 'f' Example DECF CNT, 1 Before Instruction CNT = Z = After Instruction CNT = Z = 1998 Microchip Technology Inc. DECFSZ Syntax: Operands: Operation: Status Affected: ffff Encoding: Description Words: Write to data destination Cycles: Q Cycle Activity: 0x13 If Skip: 0x13 0xEC Example ffff ...

Page 58

... Z 00 1010 dfff ffff The contents of register 'f' are incre- mented the result is placed in the W register the result is placed back in register 'f Decode Read Process Write to register data destination 'f' INCF CNT, 1 Before Instruction CNT = 0xFF After Instruction CNT = 0x00 1998 Microchip Technology Inc. ...

Page 59

... Before Instruction PC = address HERE After Instruction CNT = CNT + 1 if CNT address CONTINUE if CNT address HERE +1 1998 Microchip Technology Inc. IORLW Syntax: Operands: Operation: Status Affected: Encoding: Description: dfff ffff Words: Cycles: Q Cycle Activity: instruc- CY Example Q3 Q4 Process Write to data ...

Page 60

... After Instruction W = 0x5A Move label ] MOVWF 127 (W) (f) None 00 0000 1fff ffff Move data from W register to register . ' Decode Read Process Write register data register 'f' 'f' MOVWF OPTION_REG Before Instruction OPTION = 0xFF W = 0x4F After Instruction OPTION = 0x4F W = 0x4F 1998 Microchip Technology Inc. ...

Page 61

... PIC16C5X products. Since OPTION is a readable/writable register, the user can directly address it. Words: 1 Cycles: 1 Example To maintain upward compatibility with future PIC16CXX products, do not use this instruction. 1998 Microchip Technology Inc. RETFIE Syntax: Operands: Operation: Status Affected: 0xx0 0000 Encoding: Description ...

Page 62

... POPed and the top of the stack (TOS) is loaded into the program counter. This is a two cycle instruction Decode No-Opera No-Opera Pop from tion tion the Stack No-Opera No-Opera No-Opera No-Operat tion tion tion ion RETURN After Interrupt PC = TOS 1998 Microchip Technology Inc. ...

Page 63

... Q Cycle Activity Decode Read register 'f' Example RLF REG1,0 Before Instruction REG1 = C = After Instruction REG1 = 1998 Microchip Technology Inc. RRF f,d Syntax: Operands: Operation: Status Affected: Encoding: dfff ffff Description: Words: Cycles Cycle Activity: Process Write to data destination Example 1110 0110 0 ...

Page 64

... The result is placed in the W register Decode Read Process Write to W literal 'k' data SUBLW 0x02 Before Instruction After Instruction result is positive Before Instruction After Instruction result is zero Before Instruction After Instruction W = 0xFF result is nega- tive 1998 Microchip Technology Inc. ...

Page 65

... Before Instruction REG1 = After Instruction REG1 = 0xFF result is negative 1998 Microchip Technology Inc. SWAPF Syntax: Operands: Operation: Status Affected: dfff ffff Encoding: Description: Words: Cycles Cycle Activity: Process Write to data destination Example TRIS Syntax: Operands: Operation: Status Affected: None Encoding: Description: ...

Page 66

... Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in register 'f Decode Read Process Write to register data destination 'f' XORWF REG 1 Before Instruction REG = 0xAF W = 0xB5 After Instruction REG = 0x1A W = 0xB5 1998 Microchip Technology Inc. ...

Page 67

... A CE compliant version of PICMASTER is available for European Union (EU) countries. 1997 Microchip Technology Inc. 10.3 ICEPIC: Low-Cost PICmicro™ In-Circuit Emulator ICEPIC is a low-cost in-circuit emulator solution for the Microchip PIC12CXXX, PIC16C5X and PIC16CXXX families of 8-bit OTP microcontrollers ...

Page 68

... MPASM offers full featured Macro capabilities, condi- tional assembly, and several source and listing formats. It generates various object code formats to support Microchip's development tools as well as third party programmers. MPASM allows full symbolic debugging PICMASTER, Microchip’s Universal Emulator System. 1997 Microchip Technology Inc. from ...

Page 69

... TECH-MP, edition for imple- menting more complex systems. Both versions include Microchip’s fuzzy LAB stration board for hands-on experience with fuzzy logic systems implementation. 1997 Microchip Technology Inc. 10.14 MP-DriveWay Generator MP-DriveWay is an easy-to-use Windows-based Appli- cation Code Generator. With MP-DriveWay you can visually confi ...

Page 70

... PIC16C84 TABLE 10-1: DEVELOPMENT TOOLS FROM MICROCHIP Products Emulator DS30445A - page 70 Tools Software Programmers Boards Demo 1997 Microchip Technology Inc. ...

Page 71

... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1997 Microchip Technology Inc. ...................................................................................................... -0.3 to +14V .................................................................................. -0. ...

Page 72

... Freq: 2.0 MHz max 4.5V to 5.5V Do not use in HS mode max. at 5.5V typ 40.0 A typ. at 4.5V WDT dis PD Freq: 10 MHz max. Do not use in LP mode V : 2. 400 A max kHz, 2. 100 A max. at 4.0V WDT dis PD Freq: 200 kHz max. PIC16LC84-04 1997 Microchip Technology Inc. ...

Page 73

... SLEEP mode, with all I/O pins in hi-impedance state and tied For RC osc configuration, current through Rext is not included. The current through the resistor can be estimated by the formula 1997 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) Operating temperature - Min Typ† ...

Page 74

... 2.0V, WDT disabled, industrial DD can be lowered in SLEEP mode without losing RAM data. measurements in active operation mode are: /2Rext (mA) with Rext in kOhm +70 C (commercial +85 C (industrial) A Conditions ( MHz 5.5V OSC MHz 5.5V OSC kHz 2.0V, OSC DD , T0CKI = 1997 Microchip Technology Inc. ...

Page 75

... The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as coming out of the pin. 4: The user may use better of the two specs. 1997 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) Operating temperature 0 C ...

Page 76

... E/W V — 6.0 MIN 4.5 — 5.5 (1) — 10 — +70 C (commercial +85 C (industrial) A Conditions pF In XT, HS and LP modes when external clock is used to drive OSC1 Minimum operating MIN voltage Minimum operating MIN voltage V 1997 Microchip Technology Inc. ...

Page 77

... FIGURE 11-2: LOAD CONDITIONS Load Condition Pin 464 for all pins except OSC2 for OSC2 output. 1997 Microchip Technology Inc. T Time os,osc OSC1 ost oscillator start-up timer pwrt power-up timer rbt RBx pins t0 T0CKI wdt watchdog timer P Period R Rise V Valid Z Hi-impedance ...

Page 78

... PIC16LC84-04 ns XT, RC osc PIC16LC84-04 ns XT, RC osc PIC16C84- osc PIC16C84- osc PIC16LC84- osc PIC16LC84- osc PIC16C84- osc PIC16LC84- osc PIC16C84- osc PIC16C84- osc PIC16LC84- osc PIC16LC84- osc PIC16C84- osc PIC16LC84- osc PIC16C84- osc PIC16C84- osc PIC16LC84- osc PIC16C84-10 1997 Microchip Technology Inc. ...

Page 79

... These parameters are characterized but not tested. † Data in "Typ" column is at 5.0V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Measurements are taken in RC Mode where CLKOUT output 1997 Microchip Technology Inc ...

Page 80

... Data in "Typ" column is at 5.0V unless otherwise stated. These parameters are for design guidance only and are not tested. DS30445C-page Min Typ† Max Units 350 * — — ns 2.0V 150 * — — — 1024T — OSC1 period OSC OSC 132 * 5.0V DD — — 100 * ns 1997 Microchip Technology Inc. 34 Conditions V 3. 6.0V DD ...

Page 81

... Tt0P T0CKI Period * These parameters are characterized but not tested. † Data in "Typ" column is at 5.0V unless otherwise stated. These parameters are for design guidance only and are not tested. 1997 Microchip Technology Inc Min Typ† Max Units Conditions No Prescaler ...

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... PIC16C84 NOTES: DS30445C-page 82 1997 Microchip Technology Inc. ...

Page 83

... RC OSCILLATOR FREQUENCIES * Cext 20 pF 100 pF 300 pF *Measured in PDIP Packages.The percentage variation indicated here is part to part variation due to normal process distribution. The variation indicated is 3 standard deviation from average value. 1997 Microchip Technology Inc. is standard deviation. Frequency Normalized To +25 C Rext 10 k Cext = 100 ...

Page 84

... FIGURE 12-2: TYPICAL RC OSCILLATOR FREQUENCY vs. V 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.0 DS30445C-page 84 (Cext = 20 pF) DD Rext = 3.3k Rext = Rext = 10k Rext = 100k 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V (Volts) DD 6.0 1997 Microchip Technology Inc. ...

Page 85

... FIGURE 12-4: TYPICAL RC OSCILLATOR FREQUENCY vs. V 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 2.0 1997 Microchip Technology Inc. (Cext = 100 pF) DD Rext = 3.3k Rext = 5k Rext = 10k Rext = 100k 2.5 3.0 3.5 4.0 4.5 5.0 5.5 ...

Page 86

... PIC16C84 FIGURE 12-5: TYPICAL I vs 2.0 2.5 FIGURE 12-6: TYPICAL I vs 2.0 2.5 DS30445C-page 86 WATCHDOG DISABLED (25˚C) DD 3.0 3.5 4.0 4.5 V (Volts) DD WATCHDOG ENABLED (25˚C) DD 3.0 3.5 4.0 4.5 V (Volts) DD 5.0 5.5 6.0 5.0 5.5 6.0 1997 Microchip Technology Inc. ...

Page 87

... Watchdog Timer enabled, has two components: The leakage current which increases with higher temperature PD and the operating current of the Watchdog Timer logic which increases with lower temperature. At -40 C, the latter dominates explaining the apparently anomalous behavior. 1997 Microchip Technology Inc. WATCHDOG DISABLED DD 3.0 3 ...

Page 88

... TH vs 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 2.5 3.0 DS30445C-page 88 Max (- +85 C) Typ @ 25 C Min (- +85 C) 3.5 4.0 4.5 5.0 V (Volts) DD 3.5 4.0 4.5 V (Volts 5.5 6.0 5.0 5.5 6.0 1997 Microchip Technology Inc. ...

Page 89

... FIGURE 12-11 MCLR, T0CKI and OSC1 (IN RC MODE) vs 5.0 4.5 4 min (- + 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.0 2.5 3.0 1997 Microchip Technology Inc max (- + typ ( typ ( min (- + 3.5 4.0 4.5 V (Volts) DD PIC16C84 DD , max (- +85 C) 5.0 5.5 6.0 DS30445C-page 89 ...

Page 90

... FIGURE 12-13: MAXIMUM I vs. FREQ (EXT CLOCK, -40˚ TO +85˚C) DD 10,000 1,000 6.0V 5.5V 5.0V 4.5V 4.0V 100 3.5V 3.0V 2.5V 2.0V 10 10k 100k DS30445C-page 90 1M External Clock Frequency (Hz) 1M External Clock Frequency (Hz) 10M 100M 10M 100M 1997 Microchip Technology Inc. ...

Page 91

... Min. - 2.0 2.5 FIGURE 12-15: TRANSCONDUCTANCE (gm OSCILLATOR vs. V 10000 9000 8000 7000 6000 5000 4000 3000 2000 1000 0 2.0 3.5 1997 Microchip Technology Inc. DD Typ Min 3.0 3.5 4.0 4.5 V (Volts) DD Max @ -40 C 3.0 3.5 4.0 V (Volts) DD PIC16C84 5.0 5.5 6 ...

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... DS30445C-page 92 Max @ -40 C 3.0 3.5 4.0 4.5 V (Volts) DD Max @ -40 C 3.0 3.5 4.0 4.5 V (Volts Typ @ 25 C Min @ 85 C 5.0 5.5 DD Typ @ 25 C Min @ 85 C 5.0 5.5 1997 Microchip Technology Inc. ...

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... Max @ -40 C -16 -18 0.0 0.5 FIGURE 12-19 -10 -15 -20 -25 Typ @ 25 C -30 -35 -40 -45 0.0 0.5 1.0 1997 Microchip Technology Inc. 1.0 1.5 2.0 V (Volts) OH Min @ 85 C 1.5 2.0 2.5 3.0 3.5 V (Volts) OH PIC16C84 2.5 3.0 Max @ -40 C 4.0 4.5 5.0 DS30445C-page 93 ...

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... PIC16C84 FIGURE 12-20 0.0 0.5 FIGURE 12-21 0.0 0.5 DS30445C-page 94 Max. -40 C Typ Min. +85 C 1.0 1.5 2.0 V (Volts) OL Max @ -40 C 1.0 1.5 2.0 V (Volts) OL 2.5 3.0 Typ @ 25 C Min @ +85 C 2.5 3.0 1997 Microchip Technology Inc. ...

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... TABLE 12-2 INPUT CAPACITANCE* Pin Name PORTA PORTB MCLR OSC1/CLKIN OSC2/CLKOUT T0CKI * All capacitance values are typical part to part variation of 25% (three standard deviations) should be taken into account. 1997 Microchip Technology Inc. 3.0 3.5 4.0 4.5 5.0 V (Volts) DD Typical Capacitance (pF) 18L PDIP 5 ...

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... PIC16C84 NOTES: DS30445C-page 96 1997 Microchip Technology Inc. ...

Page 97

... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” 1997 Microchip Technology Inc ...

Page 98

... A1 NOM MAX 1.27 18 2.50 2.64 1.47 1.73 0.19 0.28 11.73 11.58 7.51 7.59 10.33 10.64 0.50 0.74 0.13 0.25 0.13 0.25 0.41 0. 0.38 0.51 0.27 0.30 0.42 0. 1997 Microchip Technology Inc. ...

Page 99

... V , RB6 (clock) and RB7 (data in/out). 1997 Microchip Technology Inc. APPENDIX B: CODE COMPATIBILITY To convert code written for PIC16C5X to PIC16C84, the user should take the following steps: 1. Remove any program memory page select operations (PA2, PA1, PA0 bits) for CALL, GOTO. ...

Page 100

... PIC16C84, please refer to the PIC16F8X data sheet. DS30445C-page 100 APPENDIX D: WHAT’S CHANGED IN THIS DATA SHEET Here’s what’s changed in this data sheet: 1. Some sections have been rearranged for clarity and consistency. 2. Errata information has been included. 1997 Microchip Technology Inc. ...

Page 101

... PIC16C84 PIC16F84 PWRTE RAM = 68 bytes MCLR pulse width (low) = 1000ns; 2. (typ @ 2V) < (max @ 4V, WDT disabled) PD =14 A (PIC16F84 (PIC16LF84) N/A TTL/ST* (* This buffer is a Schmitt Trigger input when configured as the exter- nal interrupt.) N bits 100k EXT N/A DS30445C-page 101 ...

Page 102

... PIC16C84 NOTES: DS30445C-page 102 1997 Microchip Technology Inc. ...

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... ICEPIC Low-Cost PIC16CXXX In-Circuit Emulator ........... 67 In-Circuit Serial Programming ...................................... 35, 49 INDF ................................................................................... 39 Instruction Format .............................................................. 51 Instruction Set ADDLW ...................................................................... 53 ADDWF ...................................................................... 53 ANDLW ...................................................................... 53 ANDWF ...................................................................... 53 BCF ............................................................................ 54 BSF ............................................................................ 54 BTFSC ....................................................................... 54 BTFSS ....................................................................... 55 CALL .......................................................................... 55 CLRF .......................................................................... 56 CLRW ........................................................................ 56 1997 Microchip Technology Inc. PIC16C84 CLRWDT ................................................................... 56 COMF ........................................................................ 57 DECF ......................................................................... 57 DECFSZ .................................................................... 57 GOTO ........................................................................ 58 INCF .......................................................................... 58 INCFSZ ...................................................................... 59 IORLW ....................................................................... 59 IORWF ....................................................................... 60 MOVF ........................................................................ 60 MOVLW ..................................................................... 60 MOVWF ..................................................................... 60 NOP ........................................................................... 61 OPTION ..................................................................... 61 RETFIE ...

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... Timer0 Module ........................................................... 25 TMR0 Interrupt ........................................................... 46 TMR0 with External Clock .......................................... 27 Timing Diagrams Time-out Sequence .................................................... 41 Timing Diagrams and Specifications .................................. 78 TRISA ................................................................................. 19 TRISB ........................................................................... 21 ........................................................................................ 39 Wake-up from SLEEP .................................................. 39, 48 Watchdog Timer (WDT) ................................... 35, 38, 39, 47 WDT ................................................................................... 39 Period ......................................................................... 47 Programming Considerations .................................... 47 Time-out ..................................................................... 39 DS30445C-page 104 Z Zero bit ................................................................................. 7 1997 Microchip Technology Inc. ...

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... Trademarks: The Microchip name, logo, PIC, PICSTART, PICMASTER, PRO MATE and are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. PICmicro, Flex ROM, MPLAB, and fuzzy- LAB, are trademarks and SQTP is a service mark of Microchip in the U ...

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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS30445C-page 106 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS30445C Preliminary 1997 Microchip Technology Inc. ...

Page 107

... For the latest version information and upgrade kits for Microchip Development Tools, please call 1-800-755-2345 or 1-602-786-7302. The latest version of Development Tools software can be downloaded from either our Bulletin Board or Worldwide Web Site. (Infor- mation on how to connect to our BBS or WWW site can be found in the On-Line Support section of this data sheet.) 1997 Microchip Technology Inc. /XX XXX ...

Page 108

... Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip ...

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