PIC16F84-10/P Microchip Technology, PIC16F84-10/P Datasheet - Page 210

IC MCU FLASH 1KX14 EE 18DIP

PIC16F84-10/P

Manufacturer Part Number
PIC16F84-10/P
Description
IC MCU FLASH 1KX14 EE 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F84-10/P

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
13
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Operating Supply Voltage
2 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F84-10/P
Manufacturer:
MICROCHIP
Quantity:
4 499
Part Number:
PIC16F84-10/P
Manufacturer:
MIC
Quantity:
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Part Number:
PIC16F84-10/P
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Quantity:
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PICmicro MID-RANGE MCU FAMILY
14.5
DS31014A-page 14-8
PWM Mode
In Pulse Width Modulation (PWM) mode, the CCPx pin produces up to a 10-bit resolution PWM
output. Since the CCPx pin is multiplexed with the PORT data latch, the corresponding TRIS bit
must be cleared to make the CCPx pin an output.
Figure 14-3
For a step by step procedure on how to set up the CCP module for PWM operation, see Subsec-
tion
Figure 14-3: Simplified PWM Block Diagram
A PWM output
cycle). The frequency of the PWM is the inverse of the period (1/period).
Figure 14-4: PWM Output
Note:
14.5.3 “Set-up for PWM Operation.”
Note 1:
Timer2 Module
CCP Module
Clearing the CCPxCON register will force the CCPx PWM output latch to the default
low level. This is not the port I/O data latch.
shows a simplified block diagram of the CCP module in PWM mode.
(Figure
8-bit timer is concatenated with 2-bit internal Q clock or 2 bits of the prescaler to
create 10-bit time-base.
CCPRxH (Slave)
(DCxB9:DCxB2)
Comparator
CCPRxL
14-4) has a time-base (period) and a time that the output stays high (duty
Duty cycle registers
PR2
TMR2
Comparator
8
8
10
TMR2 = PR2 + 1, TMR2 forced to 0h
10
10
Duty Cycle =
DCxB9:DCxB0
(Note 1)
Period = PR2 + 1
Clear Timer, CCPx pin
and latch the Duty Cycle
TMR2 = Duty Cycle
CCPxCON<5:4>
(DCxB1:DCxB0)
TMR2 = PR2 + 1, TMR2 forced to 0h
R
S
Q
TRIS<y>
1997 Microchip Technology Inc.
CCPx

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