PIC16F84-10/SO Microchip Technology, PIC16F84-10/SO Datasheet - Page 460

• Manufacturer Part Number: PIC16F84-10/SO
• Description: IC MCU FLASH 1KX14 EE 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F84-10/SO

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 13
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 68Byte
• Cpu Speed: 10MHz
• No. Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MIL309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
25.1
DS31025A-page 25-2
Introduction
The LCD module generates the timing control to drive a static or multiplexed LCD panel, with
support for up to 32 segments multiplexed with up to four commons. It also provides control of
the LCD pixel data.
The interface to the module consists of three control registers (LCDCON, LCDSE, and LCDPS)
used to define the timing requirements of the LCD panel and up to 16 LCD data registers
(LCD00-LCD15) that represent the array of the pixel data. In normal operation, the control regis-
ters are configured to match the LCD panel being used. Primarily, the initialization information
consists of selecting the number of commons and segments required by the LCD panel, and then
specifying the LCD Frame clock rate to be used by the panel.
Once the module is initialized for the LCD panel, the individual bits of the LCD data registers are
cleared/set to represent a turned-on pixel respectively.
Once the module is configured, the LCDEN bit (LCDCON<7>) is used to enable or disable the
LCD module. The LCD panel can also operate during sleep by clearing the SLPEN bit
(LCDCON<6>).
Figure 25-1:
Internal RC osc
T1CKI
Fosc/4
Data Bus
LCD Module Block Diagram
Timing Control
LCDCON
LCDPS
LCDSE
32 x 4
Clock
Source
Select
and
Divide
RAM
LCD
COM3:COM0
MUX
128
32
to
SEG<31:0>
TO I/O PADS
1997 Microchip Technology Inc.
TO I/O PADS