PIC18LF2523-I/SO Microchip Technology, PIC18LF2523-I/SO Datasheet - Page 8
![IC PIC MCU FLASH 16KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18LF2523-I/SO
Manufacturer Part Number
PIC18LF2523-I/SO
Description
IC PIC MCU FLASH 16KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF2523-I/SO
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
A/d Bit Size
12 bit
A/d Channels Available
10
Height
2.31 mm
Length
17.9 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC18F2XXX/4XXX FAMILY
For PIC18F2480/4480 devices, the code memory
space extends from 0000h to 03FFFh (16 Kbytes) in
one 16-Kbyte block. For PIC18F2580/4580 devices,
the code memory space extends from 0000h to
07FFFh
Addresses, 0000h through 07FFh, however, define a
“Boot Block” region that is treated separately from
Block 0. All of these blocks define code protection
boundaries within the code memory space.
The size of the Boot Block in PIC18F2480/2580/4480/
4580 devices can be configured as 1 or 2K words (see
Figure
the Configuration register, CONFIG4L. It is important to
note that increasing the size of the Boot Block
decreases the size of Block 0.
FIGURE 2-7:
DS39622L-page 8
Note:
3FFFFFh
01FFFFh
000000h
200000h
2-7). This is done through the BBSIZ<0> bit in
*
(32 Kbytes)
Sizes of memory areas are not to scale.
Boot Block size is determined by the BBSIZ<0> bit in the CONFIG4L register.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18F2480/2580/4480/4580 DEVICES
in
two
16-Kbyte
blocks.
Boot Block*
Block 0
1
Unimplemented
(PIC18FX580)
Reads all ‘0’s
32 Kbytes
Block 2
Block 3
Boot Block*
TABLE 2-6:
MEMORY SIZE/DEVICE
Block 0
0
PIC18F2480
PIC18F4480
PIC18F2580
PIC18F4580
BBSIZ<0>
Device
Block 1
Boot Block*
Block 0
IMPLEMENTATION OF CODE
MEMORY
1
Unimplemented
(PIC18FX480)
Reads all ‘0’s
16 Kbytes
2010 Microchip Technology Inc.
Code Memory Size (Bytes)
000000h-003FFFh (16K)
000000h-007FFFh (32K)
Boot Block*
Block 0
0
Address
000000h
0007FFh
000800h
000FFFh
001000h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
01FFFFh
Range