DSPIC33FJ64MC506-I/PT Microchip Technology, DSPIC33FJ64MC506-I/PT Datasheet - Page 365
![IC DSPIC MCU/DSP 64K 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
DSPIC33FJ64MC506-I/PT
Manufacturer Part Number
DSPIC33FJ64MC506-I/PT
Description
IC DSPIC MCU/DSP 64K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MA330013.pdf
(370 pages)
2.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
3.PIC24HJ12GP201-ISO.pdf
(84 pages)
4.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
5.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
6.DSPIC33FJ128MC506-IPT.pdf
(24 pages)
Specifications of DSPIC33FJ64MC506-I/PT
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC506-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Reset
Reset Sequence ................................................................. 87
Resets ................................................................................. 83
S
Serial Peripheral Interface (SPI) ....................................... 205
Setup for Continuous Output Pulse Generation................ 171
Setup for Single Output Pulse Generation ........................ 171
Software Simulator (MPLAB SIM)..................................... 306
Software Stack Pointer, Frame Pointer
Special Features of the CPU ............................................ 289
SPI
SPI Module
Symbols Used in Opcode Descriptions............................. 298
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 161
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 163
© 2007 Microchip Technology Inc.
IPC7 (Interrupt Priority Control 7) ............................. 121
IPC8 (Interrupt Priority Control 8) ............................. 122
IPC9 (Interrupt Priority Control 9) ............................. 123
NVMCOM (Flash Memory Control)............................. 79
OCxCON (Output Compare x Control) ..................... 174
OSCCON (Oscillator Control) ................................... 152
OSCTUN (FRC Oscillator Tuning) ............................ 155
OVDCON (Override Control) .................................... 193
PDC1 (PWM Duty Cycle 1)....................................... 194
PDC2 (PWM Duty Cycle 2)....................................... 194
PDC3 (PWM Duty Cycle 3)....................................... 195
PDC4 (PWM Duty Cycle 4)....................................... 195
PLLFBD (PLL Feedback Divisor).............................. 154
PTCON (PWM Time Base Control) .......................... 184
PTMR (PWM Timer Count Value)............................. 185
PTPER (PWM Time Base Period) ............................ 185
PWMCON1 (PWM Control 1) ................................... 187
PWMCON2 (PWM Control 2) ................................... 188
QEICON (QEI Control).............................................. 201
RCON (Reset Control) ................................................ 84
RSCON (DCI Receive Slot Control).......................... 274
SEVTCMP (Special Event Compare) ....................... 186
SPIxCON1 (SPIx Control 1)...................................... 210
SPIxCON2 (SPIx Control 2)...................................... 211
SPIxSTAT (SPIx Status and Control) ....................... 209
SR (CPU Status)................................................... 30, 92
T1CON (Timer1 Control)........................................... 162
TSCON (DCI Transmit Slot Control) ......................... 274
TxCON (T2CON, T4CON, T6CON or
TyCON (T3CON, T5CON, T7CON or
UxMODE (UARTx Mode).......................................... 226
UxSTA (UARTx Status and Control)......................... 228
Clock Source Selection............................................... 85
Special Function Register Reset States ..................... 86
Times .......................................................................... 85
CALLL Stack Frame.................................................... 67
Master, Frame Master Connection ........................... 207
Master/Slave Connection.......................................... 207
Slave, Frame Master Connection ............................. 208
Slave, Frame Slave Connection ............................... 208
SPI1 Register Map...................................................... 54
SPI2 Register Map...................................................... 54
Register Map............................................................... 66
AC ............................................................................. 316
T8CON Control) ................................................ 166
T9CON Control) ................................................ 167
Preliminary
Timing Characteristics
Timing Diagrams
Timing Requirements
Timing Specifications
CLKO and I/O ........................................................... 319
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0,
10-bit A/D Conversion (CHPS
12-bit A/D Conversion (ASAM = 0, SSRC = 000)..... 349
CAN I/O .................................................................... 343
Center-Aligned PWM................................................ 179
DCI AC-Link Mode.................................................... 341
DCI Multi -Channel, I
Dead-Time................................................................ 180
ECAN Bit .................................................................. 236
Edge-Aligned PWM .................................................. 178
External Clock .......................................................... 317
Frame Sync, AC-Link Start-of-Frame ....................... 264
Frame Sync, Multi-Channel Mode ............................ 264
I2Cx Bus Data (Master Mode) .................................. 335
I2Cx Bus Data (Slave Mode) .................................... 337
I2Cx Bus Start/Stop Bits (Master Mode)................... 335
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 337
I
Input Capture (CAPx) ............................................... 325
Motor Control PWM .................................................. 327
Motor Control PWM Fault ......................................... 327
OC/PWM .................................................................. 326
Output Compare (OCx) ............................................ 325
QEA/QEB Input ........................................................ 328
QEI Module Index Pulse........................................... 329
Reset, Watchdog Timer, Oscillator Start-up
SPIx Master Mode (CKE = 0) ................................... 330
SPIx Master Mode (CKE = 1) ................................... 331
SPIx Slave Mode (CKE = 0) ..................................... 332
SPIx Slave Mode (CKE = 1) ..................................... 333
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 322
TimerQ (QEI Module) External Clock ....................... 324
CLKO and I/O ........................................................... 319
DCI AC-Link Mode.................................................... 342
DCI Multi-Channel, I
External Clock .......................................................... 317
Input Capture............................................................ 325
10-bit A/D Conversion Requirements ....................... 348
12-bit A/D Conversion Requirements ....................... 350
CAN I/O Requirements............................................. 343
I2Cx Bus Data Requirements (Master Mode)........... 336
I2Cx Bus Data Requirements (Slave Mode)............. 338
Motor Control PWM Requirements........................... 327
Output Compare Requirements................................ 325
PLL Clock ................................................................. 318
QEI External Clock Requirements............................ 324
QEI Index Pulse Requirements ................................ 329
Quadrature Decoder Requirements ......................... 328
Reset, Watchdog Timer, Oscillator Start-up
Simple OC/PWM Mode Requirements ..................... 326
SPIx Master Mode (CKE = 0) Requirements............ 330
SPIx Master Mode (CKE = 1) Requirements............ 331
SPIx Slave Mode (CKE = 0) Requirements.............. 332
SPIx Slave Mode (CKE = 1) Requirements.............. 334
Timer1 External Clock Requirements ....................... 322
2
S Interface Frame Sync ......................................... 264
ASAM = 0, SSRC = 000) .................................. 346
0, ASAM = 1, SSRC = 111, SAMC =
00001)
Timer and Power-up Timer............................... 320
Timer, Power-up Timer and Brown-out
Reset Requirements......................................... 321
.......................................................... 347
2
2
S Modes ................................. 340
S Modes ................................ 339
dsPIC33F
= 01, SIMSAM =
DS70165E-page 363