PIC16LF84-04I/SO Microchip Technology, PIC16LF84-04I/SO Datasheet - Page 7

IC MCU FLASH 1KX14 EE 18SOIC

PIC16LF84-04I/SO

Manufacturer Part Number
PIC16LF84-04I/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16LF84-04I/SO

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16LF
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
4MHz
No. Of
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16LC84A-04I/SO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF84-04I/SO
Manufacturer:
MICROCHIP
Quantity:
3 200
3.0
The high performance of the PIC16CXX family can be
attributed to a number of architectural features
commonly found in RISC microprocessors. To begin
with, the PIC16CXX uses a Harvard architecture. This
to be sized differently than the 8-bit wide data word.
PIC16CXX opcodes are 14-bits wide, enabling single
word instructions. The full 14-bit wide program memory
bus fetches a 14-bit instruction in a single cycle. A two-
tions (Example 3-1). Consequently, all instructions exe-
This symmetrical nature and lack of ‘special optimal
situations’ make programming with the PIC16CXX
simple yet efficient. In addition, the learning curve is
reduced significantly.
The PIC16C84 has 36 x 8 SRAM and 64 x 8 EEPROM
data memory.
architecture has the program and data accessed from
separate memories. So the device has a program
memory bus and a data memory bus. This improves
bandwidth over traditional von Neumann architecture
where program and data are fetched from the same
memory (accesses over the same bus). Separating
program and data memory further allows instructions
stage pipeline overlaps fetch and execution of instruc-
cute in a single cycle (400 ns @ 10 MHz) except for
program branches.
The PIC16C84 addresses 1K x 14 program memory.
All program memory is internal.
PIC16CXX devices can directly or indirectly address its
register files or data memory. All special function
registers including the program counter are mapped in
the data memory. An orthogonal (symmetrical)
instruction set that makes it possible to carry out any
operation on any register using any addressing mode.
1997 Microchip Technology Inc.
ARCHITECTURAL OVERVIEW
PIC16CXX devices contain an 8-bit ALU and working
register. The ALU is a general purpose arithmetic unit.
It performs arithmetic and Boolean functions between
data in the working register and any register file.
The ALU is 8-bits wide and capable of addition,
subtraction, shift and logical operations. Unless
otherwise mentioned, arithmetic operations are two's
complement in nature. In two-operand instructions,
typically one operand is the working register
(W register), and the other operand is a file register or
an immediate constant. In single operand instructions,
the operand is either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC), and
Zero (Z) bits in the STATUS register. The C and DC bits
operate as a borrow and digit borrow out bit,
respectively, in subtraction. See the SUBLW and SUBWF
instructions for examples.
A simplified block diagram for the PIC16C84 is shown
in Figure 3-1, its corresponding pin description is
shown in Table 3-1.
PIC16C84
DS30445C-page 7

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