PIC16F874-20/P Microchip Technology, PIC16F874-20/P Datasheet - Page 226

IC MCU FLASH 4KX14 EE 40DIP

PIC16F874-20/P

Manufacturer Part Number
PIC16F874-20/P
Description
IC MCU FLASH 4KX14 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F874-20/P

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
MSSP/PSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PICmicro MID-RANGE MCU FAMILY
15.3
15.3.1
DS31015A-page 15-6
Operation
SPI Mode
The SPI mode allows 8-bits of data to be synchronously transmitted and received simulta-
neously. All four modes of SPI are supported, as well as Microwire™ (sample edge) when the
SPI is in the master mode.
To accomplish communication, typically three pins are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally a fourth pin may be used when in a slave mode of operation:
• Slave Select (SS)
When initializing the SPI, several options need to be specified. This is done by programming the
appropriate control bits in the SSPCON register (SSPCON<5:0>) and SSPSTAT<7:6>. These
control bits allow the following to be specified:
• Master Mode (SCK is the clock output)
• Slave Mode (SCK is the clock input)
• Clock Polarity (Idle state of SCK)
• Clock edge (output data on rising/falling edge of SCK)
• Data Input Sample Phase
• Clock Rate (Master mode only)
• Slave Select Mode (Slave mode only)
Figure 15-1
Figure 15-1:
shows the block diagram of the SSP module, when in SPI mode.
SSP Block Diagram (SPI Mode)
SDI
SDO
SS
SCK
Read
SS Control
TRIS bit of SCK pin
Select
Edge
Enable
bit0
Select
Edge
SSPBUF reg
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
shift clock
Write
Prescaler
4, 16, 64
data bus
Internal
TMR2 output
1997 Microchip Technology Inc.
T
CY
2

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