DSPIC33FJ128GP706A-I/MR Microchip Technology, DSPIC33FJ128GP706A-I/MR Datasheet - Page 236
![IC DSPIC MCU/DSP 128K 64-QFN](/photos/12/13/121325/c04-149_mr_sml.jpg)
DSPIC33FJ128GP706A-I/MR
Manufacturer Part Number
DSPIC33FJ128GP706A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MCP3909T-ISS.pdf
(104 pages)
2.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
4.DSPIC33FJ64GP206A-IMR.pdf
(338 pages)
Specifications of DSPIC33FJ128GP706A-I/MR
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Core Frequency
40MHz
Core Supply Voltage
3.3V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
53
Flash Memory Size
128KB
Supply Voltage Range
3V To 3.6V
Rohs Compliant
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- MCP3909T-ISS PDF datasheet
- DSPIC33FJ12GP201-ISO PDF datasheet #2
- DSPIC33FJ64GP206-IPT PDF datasheet #3
- DSPIC33FJ64GP206A-IMR PDF datasheet #4
- Current page: 236 of 338
- Download datasheet (3Mb)
dsPIC33FJXXXGPX06A/X08A/X10A
FIGURE 21-1:
DS70593B-page 236
CH1
CH2
CH3
CH0
(2)
(2)
(2)
Note
CH0SA<4:0>
CHANNEL
SCAN
V
1:
2:
3:
V
AN10
AN11
REFL
V
REFL
V
AN1
AN4
AN7
AN2
AN5
AN8
REFL
AN6
AN9
REFL
AN0
AN3
AN1
ANy
V
Channels 1, 2 and 3 are not applicable for the 12-bit mode of operation.
For 64-pin devices, y = 17; for 80-pin devices, y = 23; for 100-pin devices, y = 31; for ADC2, y = 15.
CH123SA
CH123NA CH123NB
CH123NA CH123NB
CH123SA
CH123SA
REF
CH123NA CH123NB
AN0
CH0NA CH0NB
CSCNA
(3)
+, V
ADCx MODULE BLOCK DIAGRAM
REF
CH123SB
CH123SB
CH0SB<4:0>
CH123SB
- inputs can be multiplexed with other analog inputs.
Input Selection
Alternate
+
+
-
-
+
+
-
-
Preliminary
S/H2
S/H0
S/H1
S/H3
V
REFL
V
+
REFH
(1)
SAR ADC
AV
VCFG<2:0>
2009 Microchip Technology Inc.
DD
V
V
REFL
REFL
-
(1)
AV
SS
ADC1BUF0
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