PIC16C76-20/SO Microchip Technology, PIC16C76-20/SO Datasheet - Page 4
![IC MCU OTP 8KX14 A/D PWM 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16C76-20/SO
Manufacturer Part Number
PIC16C76-20/SO
Description
IC MCU OTP 8KX14 A/D PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C76-04SP.pdf
(8 pages)
Specifications of PIC16C76-20/SO
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
22
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
0 C
On-chip Adc
5 bit
Data Rom Size
368 B
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
6 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC16C76
3. Module: SSP (SPI
TABLE 4:
4. Module: Timer1
FIGURE 1:
DS80090A-page 4
Param
71
71A
72
72A
73A
* This parameter is characterized but not tested.
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
TMR1 Increment
Clock (Input to Prescaler)
Write to TMR1H
and/or TMR1L Register(s)
TMR1H:TMR1L Increments
No.
The SPI interface timings (parameters 71, 71A, 72,
The operation of Timer1 needs some clarification
when the timer registers are written when the
TMR1ON bit is set.
The internal clock signal that is the input to the
TMR1 prescaler affects the incrementing of Timer1
(TMR1H:TMR1L registers and the Timer1 pres-
caler). When the Timer1 registers are NOT written,
the Timer1 will increment on the rising edge of the
TMR1 increment clock.
When the TMR1H and/or TMR1L registers are
written while this clock is high, TMR1 will incre-
ment on the next rising edge of this clock.
72A, 73, and 73A) have been modified. The new
values are shown in Table 4.
T
T
T
Sym.
SC
SC
B
2
H
L
B
Specifications)
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Last clock edge of the Byte1 to 1st
clock edge of the Byte2
DC SPECIFICATION CHANGES FROM DATA SHEET
WRITES TO TIMER1 (EXTERNAL CLOCK/OSCILLATOR MODE)
TM
Characteristic
Mode Timing
Continuous
Single Byte
Continuous
Single Byte
(1)
(1)
(1)
Write to TMR1H
and/or TMR1L Register(s)
1.25 T
1.25 T
+ 30 ns
+ 30 ns
1.5 T
+ 40 ns
TMR1H:TMR1L Increments
New Specification
Min
40
40
CY
CY
CY
When the TMR1H and/or TMR1L registers are
written while this clock is low, TMR1 will not incre-
ment on the next rising edge of this clock, but must
first have a falling clock and the rising clock, for
TMR1 to increment.
Figure 1 shows the two cases of writes to the
TMR1H and/or TMR1L registers. Due to the V
and V
external Timer1 oscillator components, and exter-
nal clock frequency, the Timer1 increment clock
may not be of a 50% duty cycle.
The TMR1 increment clock is out of phase of the
T1OSO/T1CKI pin by a small propagation delay.
Typ
—
—
—
—
—
IL
Max
thresholds on the oscillator/clock pins,
—
—
—
—
—
+ 20 ns
+ 20 ns
2001 Microchip Technology Inc.
Min
T
T
CY
CY
Specification
Data Sheet
N.A.
N.A.
N.A.
Typ
—
—
Max
—
—
Units
ns
ns
ns
ns
ns
IH