DSPIC33FJ128MC510-I/PT Microchip Technology, DSPIC33FJ128MC510-I/PT Datasheet - Page 195

• Manufacturer Part Number: DSPIC33FJ128MC510-I/PT
• Description: IC DSPIC MCU/DSP 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC510-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 85
• Flash Memory Size: 128KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 17-1:
© 2009 Microchip Technology Inc.
bit 4-3
bit 2
bit 1
bit 0
TQCKPS<1:0>: Timer Input Clock Prescale Select bits
11 = 1:256 prescale value
10 = 1:64 prescale value
01 = 1:8 prescale value
00 = 1:1 prescale value
(Prescaler utilized for 16-bit timer mode only)
POSRES: Position Counter Reset Enable bit
1 = Index Pulse resets Position Counter
0 = Index Pulse does not reset Position Counter
(Bit only applies when QEIM<2:0> = 100 or 110)
TQCS: Timer Clock Source Select bit
1 = External clock from pin QEA (on the rising edge)
0 = Internal clock T
UPDN_SRC: Position Counter Direction Selection Control bit
1 = QEB pin state defines Position Counter direction
0 = Control/status bit UPDN (QEICON<11>) defines Position Counter (POSCNT) direction
Note:
QEIxCON: QEI CONTROL REGISTER (CONTINUED)
When configured for QEI mode, control bit is a ‘don’t care’.
CY
dsPIC33FJXXXMCX06/X08/X10
)
DS70287C-page 193