DSPIC33FJ128GP710-I/PT Microchip Technology, DSPIC33FJ128GP710-I/PT Datasheet - Page 38
![IC DSPIC MCU/DSP 128K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ128GP710-I/PT
Manufacturer Part Number
DSPIC33FJ128GP710-I/PT
Description
IC DSPIC MCU/DSP 128K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64GP206-IPT.pdf
(322 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
4.DSPIC33FJ128MC506-IPT.pdf
(24 pages)
Specifications of DSPIC33FJ128GP710-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
100-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
85
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Data Ram Size
16 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP710-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33F
TABLE 9-5:
DS70155C-page 36
Assembly
AND
AND
AND
AND
CLR
CLR
CLR
COM
COM
IOR
IOR
IOR
IOR
NEG
NEG
SETM
SETM
SETM
XOR
XOR
XOR
XOR
Note:
When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When
{,WREG} is not specified, the destination of the instruction is the file register f.
Syntax
f {,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f
WREG
Wd
f {,WREG}
Ws,Wd
f {,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f {,WREG}
Ws,Wd
f
WREG
Wd
f {,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
LOGIC INSTRUCTIONS
Destination = f .AND. WREG
Wn = lit10 .AND. Wn
Wd = Wb .AND. lit5
Wd = Wb .AND. Ws
f = 0x0000
WREG = 0x0000
Wd = 0x0000
Destination = f
Wd = Ws
Destination = f .IOR. WREG
Wn = lit10 .IOR. Wn
Wd = Wb .IOR. lit5
Wd = Wb .IOR. Ws
Destination = f + 1
Wd = Ws + 1
f = 0xFFFF
WREG = 0xFFFF
Wd = 0xFFFF
Destination = f .XOR. WREG
Wn = lit10 .XOR. Wn
Wd = Wb .XOR. lit5
Wd = Wb .XOR. Ws
Preliminary
Description
© 2005 Microchip Technology Inc.
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