PIC18F452-I/PT Microchip Technology, PIC18F452-I/PT Datasheet - Page 8

• Manufacturer Part Number: PIC18F452-I/PT
• Description: IC MCU FLASH 16KX16 EE 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: I2C/SPI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18FXX2/XX8
3.1.1
When using low voltage ICSP, the part must be sup-
plied by the voltage specified in parameter D111, if a
bulk erase is to be executed. All other bulk erase details
as described above apply.
If it is determined that a program memory erase must
be performed at a supply voltage below the bulk erase
limit, refer to the erase methodology described in
Sections 3.1.2 and 3.2.2.
If it is determined that a data EEPROM erase must be
performed at a supply voltage below the bulk erase
limit, follow the methodology described in Section 3.4
and write ones to the array.
DS39576C-page 8
LOW VOLTAGE ICSP BULK ERASE
3.1.2
Irrespective of whether high or low voltage ICSP is
used, it is possible to erase single row (64 bytes of
data) in all panels at once. For example, in the case of
a 64-Kbyte device (8 panels), 512 bytes through 64
bytes in each panel, can be erased simultaneously dur-
ing each erase sequence. In this case, the offset of the
erase within each panel is the same (see Figure 3-5).
Multi-Panel Single Row Erase is enabled by appropri-
ately configuring the Programming Control register
located at 3C0006h.
The multi-panel single row erase duration is externally
timed and is controlled by SCLK. After a “Start Pro-
gramming” command is issued (4-bit command,
‘1111’), a NOP is issued, where the 4th SCLK is held
high for the duration of the programming time, P9.
After SCLK is brought low, the programming sequence
is terminated. SCLK must be held low for the time spec-
ified by parameter P10 to allow high voltage discharge
of the memory array.
The code sequence to program a PIC18FXX2/XX8
device is shown in Table 3-3. The flowchart shown in
Figure 3-3 depicts the logic necessary to completely
erase a PIC18FXX2/XX8 device. The timing diagram
that details the “Start Programming” command, and
parameters P9 and P10 is shown in Figure 3-6.
Note:
The TBLPTR register must contain the
same offset value when initiating the pro-
gramming sequence as it did when the
write buffers were loaded.
ICSP MULTI-PANEL SINGLE ROW
ERASE
 2010 Microchip Technology Inc.