AT91SAM7L64-CU Atmel, AT91SAM7L64-CU Datasheet - Page 487
![MCU ARM7 64K HS FLASH 144-LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
AT91SAM7L64-CU
Manufacturer Part Number
AT91SAM7L64-CU
Description
MCU ARM7 64K HS FLASH 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7L64-CU.pdf
(564 pages)
Specifications of AT91SAM7L64-CU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
36MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.55 V ~ 1.8 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
6 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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33.6.7
Register Name:
Access Type:
• LDATA: Last Data Converted
The analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conver-
sion is completed.
33.6.8
Register Name:
Access Type:
• EOCx: End of Conversion Interrupt Enable x
• OVREx: Overrun Error Interrupt Enable x
• DRDY: Data Ready Interrupt Enable
• GOVRE: General Overrun Error Interrupt Enable
• ENDRX: End of Receive Buffer Interrupt Enable
• RXBUFF: Receive Buffer Full Interrupt Enable
0 = No effect.
1 = Enables the corresponding interrupt.
6257A–ATARM–20-Feb-08
31
23
15
31
23
15
—
—
–
–
–
7
–
–
7
ADC Last Converted Data Register
ADC Interrupt Enable Register
30
22
14
30
22
14
—
—
ADC_LCDR
Read-only
–
–
–
6
ADC_IER
Write-only
–
–
6
29
21
13
29
21
13
—
—
–
–
–
5
–
–
5
28
20
12
28
20
12
—
—
–
–
–
4
–
–
4
LDATA
AT91SAM7L128/64 Preliminary
RXBUFF
OVRE3
EOC3
27
19
11
27
19
11
–
–
–
3
–
3
ENDRX
OVRE2
EOC2
26
18
10
26
18
10
–
–
–
–
2
2
GOVRE
OVRE1
EOC1
25
17
25
17
–
–
–
9
1
9
1
LDATA
OVRE0
DRDY
EOC0
24
16
24
16
–
–
–
8
0
8
0
487
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