PIC18C858-I/PT Microchip Technology, PIC18C858-I/PT Datasheet - Page 4
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PIC18C858-I/PT
Manufacturer Part Number
PIC18C858-I/PT
Description
IC PIC MCU OTP 16KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C858-I/PT
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Number Of I /o
68
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
68
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
3-Wire, I2C, SPI, USART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
68
Number Of Timers
4 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163007, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
6
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C858I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C858-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18C658/858
11. Module: Interrupts
DS80126C-page 4
When an interrupt occurs simultaneously with the
clearing of one or more interrupt enable flags in the
INTCON, PIE1 or PIE2 registers, the instruction
immediately following the interrupted instruction
may be executed before vectoring to the Interrupt
Service Routine (ISR). If that instruction is a con-
trol operation, the ISR may not execute as
intended.
In the case of conditional branch instructions, the
first instruction of the ISR may be skipped if the
tested condition would have resulted in a branch.
In the case of GOTO, CALL, or BRA instructions,
program execution may vector to the address
encoded in the instruction; the ISR will not be exe-
cuted at all. The GIE bit will still be cleared,
disabling all interrupts.
Additionally, on return from the interrupt (by exe-
cuting RETFIE), the instruction following the
interrupted instruction may be executed again.
There may be other interrupt related symptoms.
Work around
Three possible solutions are presented here.
Other solutions may exist. None of these require
special attention when setting interrupt enable bits.
1. All instructions that clear interrupt enable bits
2. Prior to disabling any interrupt source, disable
3. If interrupt priority is being used:
should be followed by a NOP instruction.
all
(INTCON<7>). After disabling the desired
interrupts, re-enable all interrupts by setting
GIE.
a) clear both GIEL and GIEH (in order) bits
b) clear the desired interrupt enable bits
c) set both GIEH and GIEL, in order to re-enable
(INTCON<7:6>) to disable all peripheral
interrupts
peripheral interrupts
interrupts
by
clearing
the
GIE
bit
12. Module: CAN Module
13. Module: A/D (External Voltage Reference)
Under certain circumstances, the module may
transmit unexpected messages. This will only hap-
pen when all of the following conditions occur
simultaneously:
1. The identifier registers for Transmit buffer
2. Either of the transmit buffers, TXB1 or TXB2,
3. The CAN module attempts to retransmit a
Work around
Clear the TXB0SIDL and TXB0SIDH registers as
part of the CAN initialization routine.
When the external voltage reference, V
selected for use with either the A/D or comparator
voltage reference, AV
the comparator module. If V
than AV
excessive current will flow into the V
Work around
If external V
0V, enable the comparator voltage reference by
setting the CVREN bit in the CVRCON register.
This disconnects V
comparator module.
TXB0 are never used or written to;
are in use; and
message that has lost one or more previous
arbitrations.
SS
and Comparator Voltage
Reference
(which must be tied externally to V
REF
- is used with a voltage other than
2003 Microchip Technology Inc.
REF
SS
- and AV
is connected to V
REF
- is a voltage other
SS
REF
within the
- pin.
REF
REF
-, is
SS
- in
),