AT91SAM9G20B-CU Atmel, AT91SAM9G20B-CU Datasheet - Page 37

IC ARM9 MPU 217-LFBGA

AT91SAM9G20B-CU

Manufacturer Part Number
AT91SAM9G20B-CU
Description
IC ARM9 MPU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9G20B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, ISI, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, I2S, SPI, UART, USART
Maximum Clock Frequency
400 MHz
Number Of Programmable I/os
96
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9G20-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
96
Ram Memory Size
96KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G20-EK - KIT EVAL FOR AT91SAM9G20 MCUAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
AT91SAM9G20-CU
AT91SAM9G20-CU

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10.4.9
10.4.10
10.4.11
6384DS–ATARM–13-Jan-10
Ethernet 10/100 MAC
Image Sensor Interface
Analog-to-Digital Converter
• Compatibility with IEEE Standard 802.3
• 10 and 100 MBits per second data throughput capability
• Full- and half-duplex operations
• MII or RMII interface to the physical layer
• Register Interface to address, data, status and control registers
• DMA Interface, operating as a master on the Memory Controller
• Interrupt generation to signal receive and transmit completion
• 28-byte transmit and 28-byte receive FIFOs
• Automatic pad and CRC generation on transmitted frames
• Address checking logic to recognize four 48-bit addresses
• Support promiscuous mode where all valid frames are copied to memory
• Support physical layer management through MDIO interface
• ITU-R BT. 601/656 8-bit mode external interface support
• Support for ITU-R BT.656-4 SAV and EAV synchronization
• Vertical and horizontal resolutions up to 2048 x 2048
• Preview Path up to 640 x 480 in RGMB mode, 2048 x2048 in grayscale mode
• Support for packed data formatting for YCbCr 4:2:2 formats
• Preview scaler to generate smaller size image
• Programmable frame capture rate
• 4-channel ADC
• 10-bit 312K samples/sec. Successive Approximation Register ADC
• -2/+2 LSB Integral Non Linearity, -1/+1 LSB Differential Non Linearity
• Individual enable and disable of each channel
• External voltage reference for better accuracy on low voltage inputs
• Multiple trigger source – Hardware or software trigger – External trigger pin – Timer Counter
• Sleep Mode and conversion sequencer – Automatic wakeup on trigger and back to sleep
• Four analog inputs shared with digital signals
0 to 2 outputs TIOA0 to TIOA2 trigger
mode after conversions of all enabled channels
AT91SAM9G20 Summary
37

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