AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 2

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2. Errata
2.1
2.1.1
2.2
2.2.1
2.3
2.3.1
2.3.2
2
DDRSDRAM Controller (DDRSDRC)
Error Corrected Code Controller (ECC)
Internal Memory
AT91SAM9G45 Errata
DDRSDRC: DDR2 Multi-port Read Optimization
ECC: Computation with a 1 clock cycle long NRD/NWE pulse
ROM Code: SAM-BA
AT91SAM9G45-ES ROM Code Replacement
Read optimization does not work for the multi-port DDR2. This feature is enabled by default in
the DDRSDRC_HS register at offset 0x2C in the DDRSDRC user interface.
Read optimization must be disabled by software by setting the DIS_ANTICIP_READ bit.
If the SMC is programmed with NRD/NWE pulse length equal to 1 clock cycle, HECC cannot
compute the parity.
It is recommended to program SMC with a value superior to 1.
The connection through USB to the SAM-BA monitor does not work.
Use JTAG or serial port to communicate with SAM-BA monitor.
Note:
Procedure to install AT91SAM9G45-ES ROM code replacement:
P r i o r t o a n y o p e r a t i o n , t h e u s e r n e e d s t o i n s t a l l A T 9 1 - I S P . e x e 1 . 1 3 a n d u n z i p
AT91SAM9G45_RomCode_Replacement.zip
with USB issue fixed. Check and conform to the following Default Jumpers Settings.
Problem Fix/Workaround
Problem/Fix Workaround
Problem Fix/Workaround
®
through USB
See the steps described below.
file that contains a version of ROM binary code
6485B–ATARM–28-Sep-09